Reconfigurable SRTM System for Road Traffic in Kingdom of Bahrain
Transport and Telecommunication, 2016 This paper presents reconfigurable hardware architecture for smart road traffic system based on Field Programmable Gate Array (FPGA). The design can be reconfigured for different timing of the traffic signals according to the received and collected data ...
El-Medany Wael +3 more
doaj +1 more source
FPGA–implementation of PID-controller by differential evolution optimization
Open Engineering, 2018 We will describe an FPGA implementation of PID-controller that uses differential evolution to optimize the coefficients of the PID controller, which has been implemented in VHDL. The original differential evolution algorithm was improved by ranking based
Hanhila Mika +2 more
doaj +1 more source
Desain ADC SAR 10-Bit Dua Kanal Simultan menggunakan Board FPGA Altera DE10
Jurnal Elkomika, 2022 ABSTRAK Desain arsitektur ADC (Analog to Digital Converter) multi kanal simultan pada perangkat kontroller dapat mengurangi jumlah intruksi (task) program yang harus dijalankan oleh mikroprosessor dan dapat digunakan untuk membentuk pengukuran simultan.
MUHAMMAD ULIN NUHA +2 more
doaj +1 more source
FPGA Design and Implementation of Data Covering Based on MD5 Algorithm [PDF]
Engineering and Technology Journal, 2016 The protection of information leads to protection of individual privacy for everyone. This protection is performed using encryption. Many types of encryption may be utilized while the simplest one is the covering of information.
Thamir R. Saeed
doaj +1 more source
Supporting Air-Conditioning Controller Design Using Evolutionary Computation
Journal of Advanced Mechanical Design, Systems, and Manufacturing, 2008 In recent years, as part of the remarkable development of electronic techniques, electronic control has been applied to various systems. Many sensors and actuators have been implemented into those systems, and energy efficiency and performance have been ...
Kazuyuki KOJIMA, Keiichi WATANUKI
doaj +1 more source
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder [PDF]
Engineering and Technology Journal, 2012 This work is a proposed simulation for forward link channel of CDMA2000 -1x system by using QPSK, 8QAM and 16QAM, and converting the proposed system to VHDL language by using Simulink HDL Coder for implementing in FPGA board.
Hadi T. Ziboon, Alaa Y. Eisa
doaj +1 more source
Parametric Macromodels of Differential Drivers with Pre-Emphasis [PDF]
, 2007 This paper discusses the extraction of behavioral models of differential drivers with pre-emphasis for the assessment of signal integrity and electromagnetic compatibility effects in multigigabit data transmission systems.
Canavero, Flavio +3 more
core +1 more source
An Embedded Implementation of Discrete Zolotarev Transform Using Hardware-Software Codesign [PDF]
Radioengineering, 2021 The Discrete Zolotarev Transform (DZT) brings an improvement in the field of spectral analysis of non-stationary signals. However, the transformation algorithm called Approximated Discrete Zolotarev Transform (ADZT) suffers from high computational ...
J. Kubak, J. Stastny, P. Sovka
doaj
A Hardware Implementation of Artificial Neural Network Using Field Programmable Gate Arrays [PDF]
, 2007 An artificial neural network algorithm is implemented using a field programmable gate array hardware. One hidden layer is used in the feed-forward neural network structure in order to discriminate one class of patterns from the other class in real time ...
Badala +10 more
core +2 more sources
Determining DfT Hardware by VHDL-AMS Fault Simulation for Biological Micro-Electronic Fluidic Arrays [PDF]
, 2005 The interest of microelectronic fluidic arrays for biomedical applications, like DNA determination, is rapidly increasing. In order to evaluate these systems in terms of required Design-for-Test structures, fault simulations in both fluidic and ...
Azais, F. +5 more
core +8 more sources