Results 11 to 20 of about 12,898 (231)
Modeling of real bistables in VHDL [PDF]
Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference, 2002 A complete VHDL model of bistables including their metastable operation is presented. An RS-NAND latch has been modelled as a basic structure, orienting its implementation towards its inclusion in a cell library. Two applications are included: description of a more complex latch (D-type) and description of a circuit containing three latches where ...
Acosta Jiménez, Antonio José +4 more
openaire +5 more sources
AmbarishChandurkar/VHDL: VHDL Lab Materials [PDF]
, 2020 This release contains my VHDL Lab .vhd files made on Xilinx ...
Ambarish Prashant Chandurkar
core +1 more source
Energy Detection UWB Receiver Design using a Multi-resolution VHDL-AMS Description [PDF]
, 2005 Ultra Wide Band (UWB) impulse radio systems are appealing for location-aware applications. There is a growing interest in the design of UWB transceivers with reduced complexity and power consumption. Non-coherent approaches for the design of the receiver
Crepaldi, Marco +5 more
core +1 more source
Advances in Electrical and Electronic Engineering, 2012 This article describes the modelling and implementation of two different variants of direct frequency synthesizer, and evaluation of the performance of the finished design, in terms of memory and speed efficiency.
Daniel Kekrt +3 more
doaj +1 more source
FPGA Design and Implementation of Data Covering Based on MD5 Algorithm [PDF]
Engineering and Technology Journal, 2016 The protection of information leads to protection of individual privacy for everyone. This protection is performed using encryption. Many types of encryption may be utilized while the simplest one is the covering of information.
Thamir R. Saeed
doaj +1 more source
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder [PDF]
Engineering and Technology Journal, 2012 This work is a proposed simulation for forward link channel of CDMA2000 -1x system by using QPSK, 8QAM and 16QAM, and converting the proposed system to VHDL language by using Simulink HDL Coder for implementing in FPGA board.
Hadi T. Ziboon, Alaa Y. Eisa
doaj +1 more source
VHDL-AMS based genetic optimisation of fuzzy logic controllers [PDF]
, 2007 Purpose – This paper presents a VHDL-AMS based genetic optimisation methodology for fuzzy logic controllers (FLCs) used in complex automotive systems and modelled in mixed physical domains.
T.J. Kazmierski +3 more
core +1 more source
An Embedded Implementation of Discrete Zolotarev Transform Using Hardware-Software Codesign [PDF]
Radioengineering, 2021 The Discrete Zolotarev Transform (DZT) brings an improvement in the field of spectral analysis of non-stationary signals. However, the transformation algorithm called Approximated Discrete Zolotarev Transform (ADZT) suffers from high computational ...
J. Kubak, J. Stastny, P. Sovka
doaj
Automotive VHDL-AMS Electro-mechanics Simulations [PDF]
, 2011 Non
RUO ROCH, Massimo +5 more
core +1 more source
Design and Implementation of Synthesizable VHDL Model for General PCMCIA I/O Cards Controller [PDF]
Engineering and Technology Journal, 2008 The portable and nomadic computer market has driven the development ofPCMCIA Cards to address the expansion needs for the user. These cards provide avast variety of hardware devices which are rugged, credit-card sized, lightweight,and power efficient ...
Yousra Abd Mohammed
doaj +1 more source