Results 11 to 20 of about 341 (156)
A Model of Wafer Warpage for Trench Field‐Plate Power MOSFETs
A new wafer warpage model is proposed for the process design of trench field‐plate power MOSFETs. Two methods are compared to estimate the warpage. In the first approach, Firstly, wafer warpage is converted from the displacement of the cell units. Secondly, wafer warpage is estimated based on the surface film stress.
Hiroaki Kato +2 more
exaly +2 more sources
Anti-Interference Spectral Confocal Sensors Based on Line Spot [PDF]
Spectral confocal displacement sensors are non-contact optoelectronic sensors widely utilized for their high accuracy, speed, and ability to measure diverse surfaces.
Bo Wang +4 more
doaj +2 more sources
Determination of the Equivalent Thickness of a Taiko Wafer Using ANSYS Finite Element Analysis
The successful handling of large semiconductor wafers is crucial for scaling up their production. Early-stage warpage control allows the prevention of undesirable asymmetric warpage, known as wafer bifurcation or buckling.
Vincenzo Vinciguerra +3 more
doaj +1 more source
Warpage Behavior on Silicon Semiconductor Device: The Impact of Thick Copper Metallization
Electrochemical deposited (ECD) thick film copper on silicon substrate is one of the most challenging technological brick for semiconductor industry representing a relevant improvement from the state of art because of its excellent electrical and thermal
Michele Calabretta +3 more
doaj +1 more source
The warpage behavior of electronic packages has become complicated in recent years owing to the miniaturization and heterogeneous integration technologies.
Junmo Kim +6 more
doaj +1 more source
An Experimental and Numerical Study on Glass Frit Wafer-to-Wafer Bonding
A thermo-mechanical wafer-to-wafer bonding process is studied through experiments on the glass frit material and thermo-mechanical numerical simulations to evaluate the effect of the residual stresses on the wafer warpage.
Seyed Amir Fouad Farshchi Yazdi +3 more
doaj +1 more source
Warpage Reduction for Power MOSFET Wafers
Wafer warpage is a baseline issue faced by semiconductor manufacturers and is, in fact, particularly conspicuous among those which are involved in the fabrication of power metal oxide semiconductor field effect transistors (MOSFETs). This is because vertical MOSFETs experience larger warpage effects compared with their conventional lateral counterparts.
Kim Ho Yeap +2 more
openaire +2 more sources
Enhancement of the Bond Strength and Reduction of Wafer Edge Voids in Hybrid Bonding
The hybrid wafer bonding technique is drawing much interest in relation to three-dimensional integration technology, and its areas of application are expanding from image sensors to semiconductor memory packages.
Yeoun-Soo Kim +2 more
doaj +1 more source
Plasma plays an important role in semiconductor processes. With the recent miniaturization and integration, the control of plasma became essential for success in the critical dimension of a few nanometers and etch narrow and deep holes with their high ...
Sung Il Cho +3 more
doaj +1 more source
A New Approach for the Control and Reduction of Warpage and Residual Stresses in Bonded Wafer
A geometrical modification on silicon wafers before the bonding process, aimed to decrease (1) the residual stress caused by glass frit bonding, is proposed. Finite element modeling showed that (2) by introducing this modification, the wafer out-of-plane
Seyed Amir Fouad Farshchi Yazdi +3 more
doaj +1 more source

