Results 41 to 50 of about 341 (156)

Active Control of Wafer Warpage Effects in PECVD: RF Stability and Film Thickness Uniformity Optimization via Preheat Management

IEEE Access
Wafer warpage poses a significant challenge to thin-film uniformity for silicon oxide (SiO ${}_{2}$ ) film deposited by plasma-enhanced chemical vapor deposition (PECVD), critically impacting semiconductor device performance and yield.
Hui Li, Saiqian Zhang, Yeliang Wang, Guangquan Lv   +3 more
doaj   +1 more source

Glass‐Ceramic Substrates for Electronics Packaging

Advanced Electronic Materials, Volume 11, Issue 20, December 3, 2025.
Xx xx. ABSTRACT The rapid advancement of wireless communication technologies, from 5G to 6G, has necessitated significant improvements in materials used for electronic packaging. Glass‐ceramics have long been promising candidates due to their unique combination of low dielectric loss, high thermal stability, and excellent mechanical properties.
Adam Shearer, Mohamed E. Eltantawy, Maziar Montazerian, Michael T. Lanagan, John C. Mauro   +4 more
wiley   +1 more source

Monolithically‐Integrated van der Waals Synaptic Memory via Bulk Nano‐Crystallization

Advanced Science, Volume 12, Issue 43, November 20, 2025.
Monolithically‐integrated van der Waals synaptic memory is presented via bulk nano‐crystallization, which overcomes the conventional limitations of 3D device integration technologies. Furthermore, bipolar resistive switching (LRS/HRS) dynamics is spatially resolved with conductive atomic force microscopy, scanning‐transmission electron microscopy, and ...
Jinhyoung Lee, Gunhyoung Kim, Hyunho Seok, Sujeong Han, Hyunwoo Shim, Yoonmi Cha, Sihoon Son, Hyunbin Choi, Magdalena Grzeszczyk, Aleksander Bogucki, Yunseok Choi, Seungil Kim, Hyeonjeong Lee, Chaerin Park, Geonwook Kim, Hosin Hwang, Hyunho Kim, Dongho Lee, Seowoo Son, Geumji Back, Hyelim Shin, Donghwan Choi, Alexina Ollier, Yeon‐Ji Kim, Lei Fang, Gyuho Han, Goo‐Eun Jung, Youngi Lee, Hyeong‐U Kim, Kenji Watanabe, Takashi Taniguchi, Sanghoon Bae, Andreas Heinrich, Won‐Jun Jang, Taesung Kim   +34 more
wiley   +1 more source

High‐Performance Micro‐LED Displays via Etching‐Damage‐Free Pixelation Strategy for Multifunctional Integrated Applications

Advanced Science, Volume 12, Issue 44, November 27, 2025.
A novel etching‐damage‐free pixelation approach based on F ion implantation has been developed for the fabrication of micro/nano‐LED arrays with a pixel density reaching 25,400 ppi. This method offers the advantages of high resolution, high efficiency, and high brightness, making it highly suitable for applications in near‐eye displays, optical ...
Jinyu Ye, Wenjuan Su, Yibin Lin, Yuyan Peng, Xiongtu Zhou, Tailiang Guo, Jiade Yuan, Jie Sun, Qun Yan, Yongai Zhang, Chaoxing Wu   +10 more
wiley   +1 more source

Compensation Method for Die Shift Caused by Flow Drag Force in Wafer-Level Molding Process

Micromachines, 2016
Wafer-level packaging (WLP) is a next-generation semiconductor packaging technology that is important for realizing high-performance and ultra-thin semiconductor devices.
Simo Yeon, Jeanho Park, Hye-Jin Lee
doaj   +1 more source

Advanced Optical Integration Processes for Photonic‐Integrated Circuit Packaging

Advanced Materials Technologies, Volume 10, Issue 19, October 7, 2025.
Photonic integrated chip packaging is a growing technology that helps make devices faster, more efficient, and more compact by using light instead of electricity. This review highlights recent progress in making these chips work better at different levels, discusses current challenges like heat and alignment, and looks at future possibilities for ...
Keuntae Baek, Minhyeok Kim, Hak‐Sung Kim, Jinho Ahn, Hongyun So   +4 more
wiley   +1 more source

A 3D Printing Strategy for Hard Curved Surfaced Circuits: From Materials to Applications

Advanced Science, Volume 12, Issue 36, September 25, 2025.
Conventional PCB etching (multi‐step) and indirect transfer techniques fail to meet structural electronics’ demands for lightweight, miniaturized, and customized manufacturing. 3D‐printed conformal circuits enable direct integration of conductive traces into substrates or onto surfaces, achieving integrated structural‐functional fabrication.
Wang Qin, Shujuan Li, Wei Wei, Haiqing Bai, Shikui Jia, Robert G Landers, Yunlong Ma, Sha Wei, Tuo Kang, Miao Zhang, Weipei Zhang, Mingkun Wang, Tongxin Guan   +12 more
wiley   +1 more source

Reliability-Driven Hybrid Modeling for Warpage Prediction and Optimization in FOWLP Decarrier

IEEE Access
In Fan-Out Wafer-Level Packaging (FOWLP), the decarrier process is a critical manufacturing stage where severe coefficient of thermal expansion (CTE) mismatches induce significant wafer warpage, posing serious risks to structural integrity and long-term ...
Wan-Chun Chuang, Po-En Chen, Jun-Yong Mao   +2 more
doaj   +1 more source

High‐Performance Flexible 2D Tellurium Semiconductor Grown by Isolated Plasma Soft Deposition for Wearable and Flexible Temperature Sensors

Small Methods, Volume 9, Issue 8, August 20, 2025.
A high‐performance flexible 2D Te semiconductor is fabricated using IPSD, preserving its helical chain structure while enhancing crystallinity. The optimized Te layer exhibited high mobility (103 cm2 V−1 s−1), smooth surface roughness (0.778 nm), and a stable negative temperature coefficient response (20–40 °C).
Tae‐Yang Choi, Jun‐Hyeok Kang, Jong‐Hyun Jang, Han‐Ki Kim   +3 more
wiley   +1 more source

Impact of Dislocation on Warpage of Thinned 4H-SiC Wafers

Materials Science Forum, 2022
In this work the relationship between changes in wafer center bow after thinning process and the wafer morphology has been shown. KOH wet etching allowed the observation and counting of dislocation in 4H-SiC substrate. In deep a correspondence between changes in wafer center bow and the dislocation density of the SiC substrate has been observed.
Brunella Cafra, Ruggero Anzalone, Andrea Severino   +2 more
openaire   +1 more source