Results 31 to 40 of about 930 (217)
Spike Anneal Peak Temperature Impact on 1T-DRAM Retention Time
IEEE Electron Device Letters, 2014 This letter reports on the spike anneal temperature influence on the retention time of 1T-dynamic random access memory cells using a single silicon-on-insulator transistor on ultrathin buried oxide wafers. A 20 $^{\circ}{\rm C}$ temperature difference (from 1070 $^{\circ}{\rm C}$ to 1050 $^{\circ}{\rm C}$ ) in the peak process ...
Albert Nissimoff +6 more
openaire +2 more sources
Modeling, simulation and electrical characterization of 1T-DRAM cell : A2RAM
, 2019 With the growing of IOTs we need specific embedded memory which will be easily implemented in IOTs applications. This memory has to respect specific requirements; like: simple operation mode, high density, low power consumption, low cost. One memory which can fill all these requirements is the DRAM. The DRAM has been proposed for the first time in 1968
F. Tcheme Wakam
openaire +3 more sources
Advancing the Frontiers of HfO<sub>2</sub>-Based Ferroelectric Memories: Innovative Concepts from Materials to Applications. [PDF]
Adv MaterHfO2‐based ferroelectric materials are promising for next‐generation memory technologies by providing outstanding performance aligning with data‐centric computing needs. This review details recent advancements in materials, devices, and integration for HfO2‐based memories, with the goal of identifying both the technological opportunities and remaining ...
Zhou Z +9 more
europepmc +2 more sources
Design of Capacitorless DRAM Based on Polycrystalline Silicon Nanotube Structure
IEEE Access, 2021 In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on a polycrystalline silicon nanotube structure with a grain boundary (GB) is designed and analyzed using technology computer-aided design (TCAD) simulation.
Jin Park +11 more
doaj +1 more source
Nanomaterials, 2023 In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM), based on polycrystalline silicon (poly-Si) nanotube structure with a grain boundary (GB), is designed and analyzed using technology computer-aided design (TCAD ...
Jin Park +11 more
doaj +1 more source
Polycrystalline-Silicon-MOSFET-Based Capacitorless DRAM With Grain Boundaries and Its Performances
IEEE Access, 2021 In this work, a capacitorless one-transistor dynamic random access memory (1T-DRAM) based on a polycrystalline silicon (poly-Si) metal–oxide–semiconductor field-effect transistor was designed and analyzed through a technology computer-aided
Sang Ho Lee +8 more
doaj +1 more source
Miniaturized Transistors, Volume II [PDF]
, 2022 In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by ...
core +1 more source
Metabolic Potential of Candidatus Saccharimonadia Including Rare Lineages in Activated Sludge. [PDF]
Environ Microbiol RepCandidatus Saccharimonadia is ubiquitously found in activated sludge processes, but its ecophysiological characteristics remain poorly understood. Metagenome analysis of Ca. Saccharimonadia in size‐fractionated activated sludge revealed that the epiparasitic lifestyle may extend to diverse lineages of Ca.
Kagemasa S +5 more
europepmc +2 more sources
Simulation Based DC and Dynamic Behaviour Characterization of Z2FET [PDF]
, 2017 This work presents a TCAD investigation of the operation of a Z2FET device for memory application, where the TCAD model is well calibrated to experimental hysteresis curves.
Adamu-Lema, Fikru +8 more
core +1 more source