Results 21 to 30 of about 26,331 (111)
Optimization Considerations for Short Channel Poly-Si 1T-DRAM
Capacitorless one-transistor dynamic random-access memory cells that use a polysilicon body (poly-Si 1T-DRAM) have been studied to overcome the scaling issues of conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM ...
Woo-Kyung Sun +2 more
core +2 more sources
InGaAs Capacitor-Less DRAM Cells TCAD Demonstration
2D numerical TCAD simulations are used to infer the behavior of III-V capacitor-less dynamic RAM (DRAM) cells. In particular, indium gallium arsenide on insulator technology is selected to verify the viability of III-V meta-stable-dip RAM cells. The cell
Carlos Navarro +7 more
doaj +1 more source
Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory
Three-terminal (3-T) thyristor random-access memory is explored for a next-generation high-density nanoscale vertical cross-point array. The effects of standby voltages on the device are thoroughly investigated in terms of gate–cathode voltage (V GC,ST ...
Hyangwoo Kim +6 more
doaj +1 more source
Low-Power Z2-FET Capacitorless 1T-DRAM
session FRAM and DRAMInternational audienceThis work highlights the features of Z2-FET capacitorless 1T-DRAM describing its operation in detail. The Z2-FET memory cell fabricated with FDSOI technology delivers large current sense margin along with long ...
Barbé, Jean-Charles +33 more
core +1 more source
Analysis of the transient characteristics of poly-Si 1T-DRAM
현대 사회는 빅데이터 사회로 인공 지능, 클라우드 시스템, 사물 인터넷 등에 필요한 전자기기가 빠른 속도로 발전하고 있다. 방대한 양의 데이터가 각 전자 기기에 저장되고 처리되기 때문에 고속력, 고용량, 고집적 메모리의 발전이 필수적이다. 특히, 1트랜지스터-1캐패시터 (1T-1C) 구조로 고집적에 유리하고 속도가 빠른 특징을 갖는 Dynamic Random Access Memory (DRAM)은 각 종 전자기기의 메인 메모리로 사용되고 있다 ...
김현정
core +1 more source
Neuromorphic hardware enables the integration of sensing, memory, and computing for intelligent artificial perception. Recent advances in multimodal fusion further highlight its potential for embodied intelligence and next‐generation human–machine interfaces.
Yixin Zhu +3 more
wiley +1 more source
Evolution of Materials and Device Stacks for HfO2‐Based Ferroelectric Memories
This review summarizes engineering strategies for HfO2 based ferroelectric memories with focus on FeCAP and FeFET structures. It describes how dopant design, stress effects, and interface engineering improve the bulk ferroelectric response. It further discusses how channel engineering supports reliable memory characteristics and scalable integration ...
Eunjin Kim, Jiyong Woo
wiley +1 more source
Design and Analysis of Core-Gate Shell-Chanel 1T DRAM
The work showcases the utility of core-gate shell-channel (CGSC) architecture for one-transistor dynamic random-access memory (1T DRAM). The advantage of gate-all-around (GAA) is that the structure has less variability issue compared with other multi ...
Park, Byung-Gook +7 more
core +1 more source
This study presents a novel three-dimensional stacked capacitorless dynamic random access memory (1T-DRAM) architecture, designed using a partially etched nanosheet (PE NS) to overcome the scaling limitations of traditional DRAM designs.
Min Seok Kim +9 more
doaj +1 more source
1T Capacitor-Less DRAM Cell Based on Asymmetric Tunnel FET Design
In this work we propose and demonstrate the use of a Tunnel FET (TFET) as capacitorless DRAM cell based on TCAD simulations and experiments. We report more experimental results on Tunnel FETs implemented as a double-gate (DG) fully-depleted Silicon-On ...
Arnab Biswas, Adrian M. Ionescu
doaj +1 more source

