Results 31 to 40 of about 26,331 (111)
Atomic Layer Deposition in Transistors and Monolithic 3D Integration
Advanced Functional Materials, Volume 36, Issue 41, 21 May 2026.Transistors are fundamental building blocks of modern electronics. This review summarizes recent progress in atomic layer deposition (ALD) for the synthesis of two‐dimensional (2D) metal oxides and transition‐metal dichalcogenides (TMDCs), with particular emphasis on their enabling role in monolithic three‐dimensional (M3D) integration for next ...
Yue Liu +5 more
wiley +1 more source
Multi-Level Cell Structure for Capacitor-Less 1T DRAM With SiGe-Based Separated Data Storing Regions
IEEE AccessOne-transistor dynamic random-access memory (1T DRAM) offers significant advantages in fabrication process and scalability over the traditional one-transistor one-capacitor (1T-1C) DRAM due to its simplified structure that eliminates the need for ...
Eungi Hwang +3 more
doaj +1 more source
Advanced Materials Technologies, Volume 11, Issue 7, 6 April 2026.A split‐gate amorphous oxide semiconductor (AOS) 2T0C DRAM effectively suppresses capacitive coupling and sneak‐path currents that occur in conventional 2T0C designs using a split‐gate read transistor. It shows a high on/off ratio, long retention time, and multiple conductance states.
Jeong‐Min Lee +3 more
wiley +1 more source
Nonvolatile Spintronic Memory Cells for Neural Networks
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2019 A new spintronic nonvolatile memory cell analogous to 1T DRAM with non-destructive READ is proposed. The cells can be used as neural computing units. A dual-circuit neural network architecture is proposed to leverage these devices against the complex ...
Andrew W. Stephan +4 more
doaj +1 more source
Electrical and Data-Retention Characteristics of Two-Terminal Thyristor Random Access Memory
IEEE Open Journal of Nanotechnology, 2020 Two-terminal (2-T) thyristor random access memory (TRAM) based on nanoscale cross-point vertical array is investigated in terms of lengths and doping concentrations of storage regions for long data retention time (Tret).
Hyangwoo Kim +5 more
doaj +1 more source
Performance Enhancement in Hafnium Oxide Through Homogeneous and Heterogeneous co‐Doping Strategies
Advanced Electronic Materials, Volume 12, Issue 7, 6 April 2026.This article presents a comprehensive co‐doping toolkit to optimize the performance and reliability of fluorite‐structure ferroelectrics like hafnium oxide. By employing homogeneous and heterogeneous co‐doping strategies, precise control over crystallization behavior, polarization hysteresis, and oxygen vacancy distribution is achieved.
Shouzhuo Yang +10 more
wiley +1 more source
Partially depleted SONOS FinFET for unified RAM (URAM)-unified function for high-speed 1T DRAM and nonvolatile memory [PDF]
, 2008 —Unified random access memory (URAM) is demon-strated for the first time. The novel partially depleted (PD) SONOS FinFET provides unified function of a high-speed capacitorless 1T DRAM and a nonvolatile memory (NVM).
Kim, Chung-Jin +27 more
core +1 more source
Advanced Electronic Materials, Volume 12, Issue 8, 20 April 2026.A novel skyrmion‐based SOT‐MRAM architecture is proposed by vertically integrating a p‐MTJ spin‐valve onto an SOT channel. Precise modulation of the interface roughness is found to govern the perpendicular magnetic anisotropy(PMA) and effective anisotropy energy.
Yohan Choi +8 more
wiley +1 more source
Organic Transistor‐Based Neuromorphic Electronics and Their Recent Applications
Small Methods, Volume 10, Issue 7, 6 April 2026.This review highlights recent progress in organic neuromorphic electronics, showing how organic semiconductors enable synaptic and neuronal functions with low power, mechanical flexibility, and biocompatibility. By bridging materials, devices, and systems, organic platforms are accelerating brain‐inspired computing toward applications in artificial ...
Ziru Wang, Feng Yan
wiley +1 more source
Fully Depleted Polysilicon TFTs for Capacitorless 1T-DRAM
, 2009 A capacitorless 1T-DRAM is fabricated on a fully depleted poly-Si thin-film transistor (TFT) template. A heavily doped back gate with a thin back-gate dielectric is employed to facilitate the formation of a deep potential well that retains excess holes ...
Kim, Chung-Jin +7 more
core +1 more source