Results 31 to 40 of about 1,615,195 (156)

EDACs and test integration strategies for NAND flash memories [PDF]

, 2010
Mission-critical applications usually presents several critical issues: the required level of dependability of the whole mission always implies to address different and contrasting dimensions and to evaluate the tradeoffs among them. A mass-memory device
Piazza, R., Stefano Di Carlo, Michele Fabiano, Politecnico Di Torino, Fabiano, Michele, Paolo Prinetto, Prinetto, Paolo Ernesto, Roberto Piazza, Piazza R., Di Carlo, Stefano   +9 more
core   +1 more source

3D NAND flash memory based on junction-less a-Si:H channel with high on/off current ratio

AIP Advances, 2022
As the key hardware unit of computing in memory, 3D NAND flash memory has been the focus of the artificial intelligence (AI) era due to its high efficiency in processing massive and diverse data, which is superior to the conventional von-Neumann ...
Xinyue Yu, Zhongyuan Ma, Kangmin Leng, Tong Chen, Wei Li, Kunji Chen, Jun Xu, Ling Xu   +7 more
doaj   +1 more source

Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages

Micromachines, 2022
Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated.
Dongwoo Lee, Changhwan Shin
doaj   +1 more source

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories [PDF]

, 2012
In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage ...
C. Zambelli, P. Olivo, Indaco, Marco, Olivo P., M. Indaco, BERTOZZI, Davide, Zambelli, C., Di Carlo, Stefano, Olivo, P., Bertozzi D., P. Prinetto, D. Bertozzi, M. Fabiano, ZAMBELLI, Cristian, OLIVO, Piero, Fabiano, Michele, Prinetto, Paolo Ernesto, S. Di Carlo, Bertozzi, D., Zambelli C.   +19 more
core   +1 more source

FLARE: A design environment for FLASH-based space applications [PDF]

, 2009
Designing a mass-memory device (i.e., a solid-state recorder) is one of the typical issues of mission-critical space system applications. Flash-memories could be used for this goal: a huge number of parameters and trade-offs need to be explored.
Stefano Di Carlo, Caramia, M., Michele Fabiano, Caramia M., Fabiano, Michele, Paolo Prinetto, Prinetto, Paolo Ernesto, Di Carlo, Stefano, Maurizio Caramia   +8 more
core   +1 more source

Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2020
As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia, Lei Jin, Wei Hou, Zhiyu Wang, Songmin Jiang, Kaiwei Li, Dejia Huang, Hongtao Liu, Wenzhe Wei, Jianwei Lu, An Zhang, Zongliang Huo   +11 more
doaj   +1 more source

Experimental Investigation of Threshold Voltage Temperature Effect During Cross-Temperature Write–Read Operations in 3-D NAND Flash

IEEE Journal of the Electron Devices Society, 2021
Reading data at a temperature which different from writing can cause a large number of failed bits in 3D NAND Flash memory. In this work, the threshold voltage (Vth) temperature effect of 3D NAND flash memory cell was investigated and a method was ...
Dan Wu, Hailong You, Xiaoguang Wang, Shujing Zhong, Qi Sun   +4 more
doaj   +1 more source

A novel gate-all-around with back-gate (GAAB) 3D NAND flash memory structure for high performance with disturbance-less program operation

Memories - Materials, Devices, Circuits and Systems, 2023
In this paper, we propose a gate-all-around with back-gate (GAAB) 3D NAND flash memory structure for high performance and reliability. First, in the selected string, we confirmed that the proposed structure can improve program performance using negative ...
Jae-Min Sim, In-Ku Kang, Sung-In Hong, Changhan Kim, Changhyun Cho, Kyunghoon Min, Yun-Heub Song   +6 more
doaj   +1 more source

Memorie Flash a NAND [PDF]

, 2022
In questa tesi verranno trattate le memorie Flash. Partendo da una breve introduzione all'argomento, si studierà prima il funzionamento a livello fisico del transistor, il suo inserimento in un'architettura a NAND e i metodi di accesso e scrittura del ...
Felber, Henry
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Modello del DCP nelle memorie 3D NAND Flash [PDF]

, 2022
LAUREA MAGISTRALELa crescente volontà di aumentare la densità di dati immagazzinabili, in dispositivi di dimensioni sempre più ridotte e più economici da fabbricare, ha condotto la ricerca verso la miniaturizzazione delle memorie NAND.
MONCELLI, VITO FRANCESCO
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