Results 41 to 50 of about 1,615,195 (156)
IEEE Journal of the Electron Devices Society, 2021 For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du +6 more
doaj +1 more source
Electronics Letters, 2022 This letter presents an efficient built‐in error detection methodology for 3D NAND flash memories, in which fast page‐oriented data comparison and column parallel error detection are firstly proposed.
HM. Cao +5 more
doaj +1 more source
Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2021 Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng +13 more
doaj +1 more source
Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory
IEEE Access, 2021 In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang +3 more
doaj +1 more source
IEEE Access, 2023 To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh +4 more
doaj +1 more source
Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory
, 2021 3D NAND flash memory faces unprecedented complicated interference than planar NAND flash memory, resulting in more concern regarding reliability and performance. Stronger error correction code (ECC) and adaptive reading strategies are proposed to improve
Fei Wu +15 more
core +1 more source
Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays
IEEE Journal of the Electron Devices Society, 2023 In this paper, we present a detailed experimental investigation of high-temperature data retention in 3D floating-gate NAND Flash memory arrays. Data reveal that charge detrapping from the cell tunnel oxide and depassivation of traps in the string ...
Gerardo Malavena +4 more
doaj +1 more source
Single Event Effects in 3D NAND Flash Memory Cells with Replacement Gate Technology [PDF]
, 2022 We studied the heavy-ion single event effect response of 3D NAND Flash memory cells with charge-trap based replacement gate technology. Error cross sections, threshold voltage shifts, and underlying mechanisms are discussed.
Gerardin S. +6 more
core +1 more source
Analysis of the Down-coupling phenomenon in 3D NAND flash memories [PDF]
, 2020 LAUREA MAGISTRALELa tecnologia NAND flash rappresenta una delle principali soluzioni nel mercato delle memorie non volatili. La costante richiesta di performance migliori e un maggiore risparmio di spazio ha spinto le industrie di semiconduttori a ...
GIULIANINI, MATTIA
core
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Advanced Science, EarlyView.Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source