Results 31 to 40 of about 2,098 (165)

Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines [PDF]

, 2010
Large-capacity Content Addressable Memory (CAM) is a key element in a wide variety of applications. The inevitable complexities of scaling MOS transistors introduce a major challenge in the realization of such systems.
Derek Abbott, Kamran Eshraghian, Kyoung-rok Cho, Omid Kavehei, Soon-ku Kang, Student Member, Sung-mo Steve Kang   +6 more
core  

Materials Design Principles for Large Memory Windows: Coercive Voltage Engineering in Ferroelectric– Dielectric Heterostructures

Advanced Electronic Materials, EarlyView.
Coercive voltage enhancement in hafnia‐based ferroelectric–dielectric heterostructures is shown to originate from leakage‐governed voltage division between the ferroelectric and dielectric layers. Through experiments, circuit modeling, and defect‐based simulations, a universal framework is established to engineer large memory windows without altering ...
Prasanna Venkatesan, Hari Jayasankar, Salma Soliman, Priyankka Ravikumar, Lance Fernandes, Chinsung Park, Amrit Garlapati, Chengyang Zhang, Sanghyun Kang, Shimeng Yu, Suman Datta, Asif Khan, Mengkun Tian, Zheng Wang, Kijoon Kim, Kwangyou Seo, Kwangsoo Kim, Wanki Kim, Daewon Ha, Luca Larcher, Gaurav Thareja, Andrea Padovani   +21 more
wiley   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Discrete-Trap Effects on 3-D NAND Variability – Part I: Threshold Voltage

IEEE Journal of the Electron Devices Society
In this two-part article we discuss the difference between a continuous and a discrete approach to trap modeling in the simulation of 3-D NAND Flash memories with polysilicon channel. In Part I we focus on threshold voltage $({\mathrm { V}}_{\mathrm { T}
Gerardo Malavena, Salvatore M. Amoroso, Andrew R. Brown, Plamen Asenov, Xi-Wei Lin, Victor Moroz, Mattia Giulianini, David Refaldi, Christian Monzio Compagnoni, Alessandro S. Spinelli   +9 more
doaj   +1 more source

Transient Analysis of Warm Electron Injection Programming of Double Gate SONOS Memories by means of Full Band Monte Carlo Simulation

, 2008
In this paper we investigate "Warm Electron Injection" as a mechanism for NOR programming of double-gate SONOS memories through 2D full band Monte Carlo simulations.
Furnemont A., G. Giusi, G. Iannaccone, Hagenbeck R., Han Z., Lin H., Lombardo S., Ohkura Y., Pang H., Razafmdramora J., U. Ravaioli, Vianello E., Yih C. M.   +12 more
core   +1 more source

Flexible Memory: Progress, Challenges, and Opportunities

Advanced Intelligent Discovery, EarlyView.
Flexible memory technology is crucial for flexible electronics integration. This review covers its historical evolution, evaluates rigid systems, proposes a flexible memory framework based on multiple mechanisms, stresses material design's role, presents a coupling model for performance optimization, and points out future directions.
Ruizhi Yuan, Sen Chen, Minghui Guo, Ziliang Cui, Yujie Du, Jing Liu   +5 more
wiley   +1 more source

Duality between erasures and defects

, 2016
We investigate the duality of the binary erasure channel (BEC) and the binary defect channel (BDC). This duality holds for channel capacities, capacity achieving schemes, minimum distances, and upper bounds on the probability of failure to retrieve the ...
Kim, Yongjune, Kumar, B. V. K. Vijaya
core   +1 more source

Cryogenic Neuromorphic Synaptic Behavior in 180 nm Silicon Transistors for Emerging Computing Systems

Advanced Intelligent Systems, EarlyView.
This study investigates the neuromorphic plasticity behavior of 180 nm bulk complementary metal oxide semiconductor (CMOS) transistors at cryogenic temperatures. The observed hysteresis data reveal a signature of synaptic behavior in CMOS transistors at 4 K.
Fiheon Imroze, Bhavani Yalagala, Naveen Kumar, Mostafa Elsayed, Meraj Ahmad, Robert Graham, Vihar Georgiev, Hadi Heidari, Martin Weides   +8 more
wiley   +1 more source

Unveiling the Hybrid‐Channel (poly‐Si/IGO) Structure for 3D NAND Flash Memory for Improving the Cell Current and GIDL‐Assisted Erase Operation

Small Structures
Oxide semiconductors (OSs) are promising materials for NAND flash memory, offering the advantages of high field‐effect mobility and superior large‐area uniformity but suffering from low thermal stability, trade‐off between mobility and stability, and the
Su‐Hwan Choi, Jae‐Min Sim, Jeongmin Shin, Seong‐Hwan Ryu, Taewon Hwang, So Young Lim, Hye‐Jin Oh, Jae‐Hyeok Kwag, Jun‐Yeoub Lee, Ki‐Cheol Song, Yeonhee Lee, Minju Song, Junghwan Kim, Chang‐Kyun Park, Yun‐Heub Song, Jin‐Seong Park   +15 more
doaj   +1 more source

Fully CMOS‐Compatible 3‐T Embedded NOR Flash Memory Achieving 28 ns Long‐Term Potentiation/Long‐Term Depression for High‐Speed Online Training Accelerators

Advanced Intelligent Systems, EarlyView.
A fully complementary metal–oxide–semiconductor process‐compatible novel 3‐T embedded NOR flash is demonstrated on a 28 nm fully depleted silicon‐on‐insulator platform. The proposed memory achieves record‐fast 28‐long‐term potentiation and depression , offering high‐speed and highly reliable synaptic behavior for online training in neuromorphic ...
Jae Seung Woo, Kyoung Min Choi, Geun Tae Park, Jin Ho Chang, Woo Young Choi   +4 more
wiley   +1 more source