Results 101 to 110 of about 55,100,936 (115)
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All-digital phase locked loop (ADPLL) system
2008VANSELOW FRANK, CHAN CHUNG SAN ROGER
openaire +1 more source
Modeling and Implementation of an All Digital Phase-Locked-Loop for Grid-Voltage Phase Detection
IEEE Transactions on Industrial Informatics, 2013Jianbo Sun, Hua Geng, Yang Geng
exaly
A PVT Tolerant 10 to 500 MHz All-Digital Phase-Locked Loop With Coupled TDC and DCO
IEEE Journal of Solid-State Circuits, 2010Shengdong Zhang, Yangyuan Wang
exaly
A Low-Jitter Fast-Locked All-Digital Phase-Locked Loop With Phase–Frequency-Error Compensation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016Chia-Yu Yao
exaly
A 2.4-GHz Low-Power All-Digital Phase-Locked Loop
IEEE Journal of Solid-State Circuits, 2010Kari Stadius +2 more
exaly
Digital-to-time converter (DTC) assisted all digital phase locked loop (ADPLL) circuit
2019YEO THENG TEE +4 more
openaire +4 more sources
Analog-Input Digital Phase-Locked Loops for Precise Frequency and Phase Demodulation
IEEE Transactions on Circuits and Systems Part 2: Express Briefs, 1995I Galton
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An FPGA-Based Linear All-Digital Phase-Locked Loop
IEEE Transactions on Circuits and Systems I: Regular Papers, 2010Harald Klingbeil +2 more
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Automatic All-Digital Phase-Locked Loop System Design and Optimization Tool
2020Hesham Omran, Khaled Sharaf
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