Results 91 to 100 of about 55,100,936 (115)

Single-Event Characterization of Bang-bang All-digital Phase-locked Loops (ADPLLs)

IEEE Transactions on Nuclear Science, 2015
The single-event vulnerability of a bang-bang ADPLL is investigated through fault injection experiments and circuit simulations. Single-event upsets in the digital loop filter result in the worst-case error response of the ADPLL, often requiring phase reacquisition.
Y. P. Chen, L. W. Massengill, B. L. Bhuva, W. T. Holman, T. D. Loveless, W. H. Robinson, N. J. Gaspard, A. F. Witulski   +7 more
openaire   +1 more source

Design and Simulation of CMOS Fractional-N All-Digital Phase-Locked Loop (ADPLL)

2024 International Microwave and Antenna Symposium (IMAS)
openaire   +3 more sources

A TDC-Less All-Digital Phase Locked Loop for Medical Implant Applications

Microprocessors and Microsystems, 2019
A TDC-less, ultra-low area and low power all-digital phase locked loop (ADPLL) has been designed for use in biomedical implant transceivers. The proposed ADPLL eliminates the use of LC oscillator and time-to-digital converter (TDC) for achieving a low ...
Liter Siek
exaly   +2 more sources

All Digital Phase Locked Loop (ADPLL) and Its Blocks—A Comprehensive Knowledge

2022
Lalita Yadav, Manoj Duhan
openaire   +1 more source

RTL & Physical Design Flow of Power Efficient Components of All Digital Phase Locked Loop (ADPLL)

2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO), 2022
Aaditya Joshi, Nishit Nathwani, Rutu Parekh   +2 more
openaire   +1 more source

Single-Event Characterization of Common 1<formula> <tex>$^{\hbox{st}}$</tex> </formula> and 2<formula> <tex>$^{\hbox{nd}}$</tex> </formula>-order All-digital Phase-locked Loops (ADPLLs)

IEEE Transactions on Nuclear Science, 2017
Yanran P. Chen, Lloyd W. Massengill, Jeffrey S. Kauppila, Bharat L. Bhuva, W. Tim Holman, Thomas D. Loveless   +5 more
openaire   +1 more source

All digital phase locked loop (ADPLL) with frequency locked loop

2020
MOEHLMANN ULRICH, KÖLLMANN ANDREAS JOHANNES, SCHERNER CHRISTIAN   +2 more
openaire   +2 more sources

Design and Implementation of a Digital Phase Frequency Detector for All Digital Phase Locked Loops (ADPLL)

2025 IEEE International Microwave and Antenna Symposium (IMAS)
Mahmoud Desoky, Mohamed R. Elmezayen, Ahmed Naguib   +2 more
openaire   +1 more source

Design and Comparative Analysis of an All-Digital Phase-Locked Loop (ADPLL) across CMOS Technology Nodes

2026 8th International Conference on Devices, Circuits, and Systems (ICDCS)
Harshith Varma Rudra Raju, Papanasam E
openaire   +1 more source

All Digital Phase Locked Loop (ADPLL) and Its Blocks—A Comprehensive Knowledge

Smart Innovation, Systems and Technologies, 2023
exaly