Results 101 to 110 of about 1,100 (152)

Ge Pocket-Based Dual Gate Tunnel FET: A Label-Free Biosensor. [PDF]

ACS Omega
Wani MS, Khan A, Alharbi AG, Aldkeelalah SS, Loan SA.   +4 more
europepmc   +1 more source

Ternary Logic Design Based on Novel Tunneling-Drift-Diffusion Field-Effect Transistors. [PDF]

Nanomaterials (Basel)
Lu B, Qiang H, Wang D, Cui X, Di J, Miao Y, Wang Z, Yu J.   +7 more
europepmc   +1 more source

A technique to reduce the probability of band-to-band tunneling for eliminating injected minority carriers in nano scale field-effect diode. [PDF]

Sci Rep
Rezaei A, Orouji AA.
europepmc   +1 more source

Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM. [PDF]

Discov Nano
Bae SJ, Lee SH, Park J, Kim MS, Hong JW, Koh WS, Yun GS, Jang J, Bae JH, Kang IM.   +9 more
europepmc   +1 more source

Energy-efficient neuromorphic system using novel tunnel FET based LIF neuron design for adaptable threshold logic and image analysis applications. [PDF]

Sci Rep
Bashir F, Zahoor F, Alzahrani A, Abbas H.   +3 more
europepmc   +1 more source

Direct investigation of localized leakage currents in GaN-on-sapphire pn-diodes. [PDF]

Sci Rep
Kinstler AD, Neumann R, Taylor AA, Besendörfer S, Meissner E, Weingärtner R, Brunner F, Brusaterra E, Bahat Treidel E, Schulze J.   +9 more
europepmc   +1 more source

Scaling, Leakage Current Suppression, and Simulation of Carbon Nanotube Field-Effect Transistors. [PDF]

Nanomaterials (Basel)
Gong W, Cai Z, Geng S, Gan Z, Li J, Qiang T, Jiang Y, Cai M.   +7 more
europepmc   +1 more source

Enhancing subthreshold slope and ON-current in a simple iTFET with overlapping gate on source-contact, drain Schottky contact, and intrinsic SiGe-pocket. [PDF]

Discov Nano, 2023
Lin JT, Lin KP, Cheng KM.
europepmc   +1 more source

Simulation-Based Performance Assessment of Bulk Junctionless FET with Asymmetric Source/Drain for Ultrasensitive Detection of Biomolecules. [PDF]

Biosensors (Basel)
Son J, Meyyappan M, Kim K.
europepmc   +1 more source

Design and Study of a Novel P-Type Junctionless FET for High Performance of CMOS Inverter. [PDF]

Micromachines (Basel)
Wang B, Tang Z, Song Y, Liu L, Yang W, Wu L.   +5 more
europepmc   +1 more source