Results 251 to 260 of about 418,483 (315)

Tapered Cladding Design for Monolithic Waveguide-Photodetector Coupling in Si-Based Integrated Photonics. [PDF]

Nanomaterials (Basel)
Gonzalez-Fernandez AA, Vazquez-Hernandez JA, Aguilar-Valdez F, Moffat N.   +3 more
europepmc   +1 more source

Large-scale complementary carbon nanotube integrated circuits for harsh radiation environments. [PDF]

Sci Adv
Zhang K, Zhou D, Gao N, Zhang J, Tong Z, Zhao J, Liu P, Wang X, Lin X, Xu H, Peng LM, Zhao W.   +11 more
europepmc   +1 more source

Recent Progress in on-Demand Transfer-Enabled Integration of Wavelength-Scale Light Sources. [PDF]

Nanophotonics
Kim H, Shin D, Bae GY, Lee GW, Jung HY, So JP, Kim MK, No YS.   +7 more
europepmc   +1 more source

Multiplexed nanophotonic sensor arrays for time-resolved biomolecular analysis. [PDF]

Biosens Bioelectron
Miller LM, Reardon CP, Leslie KG, Silver CD, Male JS, Mahon CS, Krauss TF, Johnson S.   +7 more
europepmc   +1 more source

Intrinsic annealing in a hybrid memristor-magnetic tunnel junction Ising machine. [PDF]

Nat Commun
Iftakher MA, Levices H, Harabi KE, Renaudineau A, Faye MC, Bouchard C, Disdier F, Viala B, Vianello E, Talatchian P, Garello K, Querlioz D, Hutin L.   +12 more
europepmc   +1 more source

Enabling state-of-the-art sensitivity of patch-antenna-coupled TeraFETs for the >1-THz frequency band using superstrate lenses

Holstein J, But DB, Krysl A, Lisauskas A, Roskos HG.   +4 more
europepmc   +1 more source

Some of the next articles are maybe not open access.

Related searches:

Optical characteristics of CMOS-fabricated MOSFET's

IEEE Journal of Solid-State Circuits, 1987
A CMOS fabricated MOSFET in a floating p-well on a semiconducting n-type substrate is optically sensitive and can be used for photoreception in CMOS circuitry. Experimental results for the logarithmic dependence of threshold voltage V/SUB th/ and channel current I/SUB D/ on light intensity compare well with the theory. However, the floating p-well also
J C Daly
exaly   +3 more sources

A Systems Approach to Computing in Beyond CMOS Fabrics

Proceedings of the 54th Annual Design Automation Conference 2017, 2017
Emerging applications require computing platforms to extract task-relevant information from increasingly large amounts of data. These requirements place stringent constraints on energy efficiency, throughput, latency, and for certain data types, security and privacy of computing platforms.
Ameya Patil 0001, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young   +11 more
openaire   +1 more source

CMOS-Fabricated Ring Surface Ion Trap with TSV Integration

2023 International Electron Devices Meeting (IEDM), 2023
We present the design, fabrication, and test of ring surface trap on 12-inch wafers with a CMOS process. The design is based on Through Silicon Vias (TSV) interconnects. Up to 200 ions were loaded and cooled; preliminary compensations of electrostatic potential imperfections show that rotational symmetry can be partially restored.
Zhao, Peng, Lim, Yu Dian, Li, Hongyu, Likforman, Jean-Pierre, Guidoni, Luca, Desormeaux, Lilay Gros, Tan, Chuan Seng   +6 more
openaire   +2 more sources