Results 41 to 50 of about 537,942 (300)
Standard CMOS Process Integrated Silicon-Based Ultraviolet-Infrared Complementary Sensor
This study proposes a new ultraviolet-infrared (UV-Ir) compatible sensor fabricated using the standard CMOS process. The concept is verified through a numerical simulation, wherein the standard CMOS process parameters used are evaluated.
Takaya Sugiura +2 more
doaj +1 more source
3-D integration requirements for hybrid nanoscale-CMOS fabrics [PDF]
Several nanoscale-computing fabrics based on novel materials such as semiconductor nanowires, carbon nanotubes, graphene, etc. have been proposed in recent years. However, their integration and interfacing with external CMOS has received only limited attention.
Pavan Panchapakeshan +5 more
openaire +1 more source
Space optical instruments optimisation thanks to CMOS image sensor technology [PDF]
Today, both CCD and CMOS sensors can be envisaged for nearly all visible sensors and instruments designed for space needs. Indeed, detectors built with both technologies allow excellent electro-optics performances to be reached, the selection of the most
Magali Estribeau +15 more
core +1 more source
MemCAM: A Hybrid Memristor-CMOS CAM Cell for On-Chip Caches
Non-volatile nanoscale memory devices (such as memristors) have promised to overcome the challenges of scalability and leakage currents of CMOS based memory devices.
Zareen Sadiq, Shehzad Hasan
doaj +1 more source
Development of CMOS active pixel sensors [PDF]
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This thesis describes an investigation into the suitability of complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) devices for ...
Greig, Thomas Alexander
core +6 more sources
New 3-D CMOS Fabric With Stacked Horizontal Nanowires
As 2-D CMOS reaches its fundamental scaling limits due to device, manufacturing, and interconnect bottleneck related constraints at the nanoscale, migration to 3-D provides a possible alternative to continue technology scaling in future. Toward that goal, several 3-D integration approaches with multi-die, multichip, and sequential layers stacking are ...
Naveen Kumar Macha +2 more
openaire +2 more sources
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
High performances monolithic CMOS detectors for space applications [PDF]
During the last 10 years, research about CMOS image sensors (also called APS -Active Pixel Sensors) has been intensively carried out, in order to offer an alternative to CCDs as image sensors.
Franck Corbiere +17 more
core +1 more source
Optoelectronic synaptic devices based on solution‐processed molecular telluride GST‐225 phase‐change inks are demonstrated for three‐factor learning. A global optical signal broadcast through a silicon waveguide induces non‐volatile conductance updates exclusively in locally electrically flagged memristors.
Kevin Portner +14 more
wiley +1 more source

