Results 81 to 90 of about 941 (185)

PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips

Data movement between the processor and the main memory is a first-order obstacle against improving performance and energy efficiency in modern systems.
Yuksel, Ismail Emir, Luo, Haocong, Sadrosadati, Mohammad, Bostanci, F. Nisa, Mutlu, Onur, Oliveira, Geraldo F., Tugrul, Yahya Can, Olgun, Ataberk, Luna, Juan Gomez, Soysal, Melina, Yaglikci, Abdullah Giray   +10 more
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Exploiting OS-level Memory Offlining for DRAM Power Management

, 2019
Power and energy consumed by main memory systems in data-center servers have increased as the DRAM capacity and bandwidth increase. Particularly, background power accounts for a considerable fraction of the total DRAM power consumption; the fraction will
Kim, N.S., Lee, Seung. Hak., Kim, Daehoon   +2 more
core   +1 more source

Memory Controller Policies for DRAM Power Management

, 2008
The increasing importance of energy e ciency has produced amultitude of hardware devices with various power management features. This paper investigates memory controller policies for manipulating DRAM power states in cache-based systems.

core  

DRAM-aware prefetching and cache management [PDF]

, 2011
textMain memory system performance is crucial for high performance microprocessors. Even though the peak bandwidth of main memory systems has increased through improvements in the microarchitecture of Dynamic Random Access Memory (DRAM) chips ...
Lee, Chang Joo, 1975-
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Optimization of advanced, high-speed DRAM input-output circuits

, 2008
Computer systems gain performance from year to year. New operating systems and applications increase the demand on processing speed and memory.The memory density in a computer system doubles every two years.
Weiß, Franz
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Blockchain, Artificial Intelligence, and Cyber Defense on Sensor Networks. [PDF]

Sensors (Basel)
Watanabe H.
europepmc   +1 more source

A field-programmable gate array based on wafer-scale 2D semiconductor. [PDF]

Natl Sci Rev
Sun Q, Ao M, Dong X, Shi K, Gou S, Zhu Y, Zhang Z, Zhang J, Hu Y, Sun Z, Chen X, Wang L, Bao W, Zhou P.   +13 more
europepmc   +1 more source

Deposition of HfO₂ by Remote Plasma ALD for High-Aspect-Ratio Trench Capacitors in DRAM. [PDF]

Nanomaterials (Basel)
Kim J, Hwang I, Kim B, Lee W, Song J, Jung Y, Yoon C.   +6 more
europepmc   +1 more source

A highly energy-efficient multi-core neuromorphic architecture for training deep spiking neural networks. [PDF]

Nat Commun
Li M, Zhou H, Xu X, Zhong Z, Quan P, Zhu X, Lin Y, Lin W, Li X, Wang D, Zhang J, Ma Y, Cui X, Wang W, Meng Q, Ma Z, Li G, Cui X, Tian Y.   +18 more
europepmc   +1 more source

The New DRAM Interfaces: SDRAM, DRDRAM and Variants

, 2008
. For the past two decades, developments in DRAM technology, the primary technology for the main memory of computers, have been directed towards increasing density.
Bruce Jacob, Trevor Mudge, Brian Davis
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