An Ultra-Low-Power Track-and-Hold Amplifier [PDF]
, 2018 The future of electronics is the Internet of Things (IoT) paradigm, where always-on devices and sensors monitor and transform everyday life. A plethora of applications (such as navigating drivers past road hazards or monitoring bridge and building ...
Niemela, George Earl
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Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation. [PDF]
Discov Nano, 2023 Lin JT, Chang YC.
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Gate-to-channel parasitic capacitance minimization and source-drain leakage evaluation in germanium PMOS [PDF]
, 2009 This work studies the behavior of both gate-to-channel capacitance (CGC) and source-channel-drain/well leakage in metal-gate/high-κ/Ge PMOS technology (W = 10 μm and L = 10; 5; 1 μm) under development at IMEC.
Krom, Raymond T.
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The understanding of the impact of efficiently optimized underlap length on analog/RF performance parameters of GNR-FETs. [PDF]
Sci Rep, 2023 Ahmad MA, Kumar J.
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Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems [PDF]
, 2010 In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the adaptive optimal reverse body-bias voltage. The adaptive optimal body-bias
Choi, Minsu +2 more
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Simulation Study: The Impact of Structural Variations on the Characteristics of a Buried-Channel-Array Transistor (BCAT) in DRAM. [PDF]
Micromachines (Basel), 2022 Sun M, Baac HW, Shin C.
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Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. [PDF]
Micromachines (Basel), 2023 You K, Jin L, Jia J, Huo Z.
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Development and modeling of a low temperature thin-film CMOS on glass [PDF]
, 2009 The push to develop integrated systems using thin-film transistors (TFT) on insulating substrates (i.e. glass) has always been limited due to low-mobility semiconducting films such as amorphous and polycrystalline silicon.
Manley, Robert G.
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Effects of Poly-Si Grain Boundary on Retention Characteristics under Cross-Temperature Conditions in 3-D NAND Flash Memory. [PDF]
Micromachines (Basel), 2023 An U +6 more
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Mathematical Modeling of Drain Current Estimation in a CSDG MOSFET, Based on La2O3 Oxide Layer with Fabrication-A Nanomaterial Approach. [PDF]
Nanomaterials (Basel), 2022 Gowthaman N, Srivastava VM.
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