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High-K dielectrics for the gate stack
Journal of Applied Physics, 2006This article gives an overview of recent developments in the search for the next-generation dielectric for the complementary metal-oxide semiconductor gate stack. After introducing the main quantities of interest, the paper concentrates on a figure of merit that connects two main properties of the gate stack, namely, the leakage current and the ...
Jean-Pierre Locquet +4 more
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High-K Dielectrics: The Example of Pr2O3
2004Praseodymium oxide is a rare earth metal oxide that has not been used for microelectronic applications so far. It has a dielectric constant in the range of 30–40 and thermodynamic estimates indicate its stability against critical reactions with silicon.
H. J. Osten +4 more
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Effect of high K dielectric on mobility of graphene FET
Proceedings of the International Conference & Workshop on Emerging Trends in Technology - ICWET '11, 2011In order to overcome the limitation of Moore's law in recent years much attention has been focused on graphene as an alternative to silicon. In this paper different gate dielectric materials for use in graphene transistors is examined. Evaporated HfO2 is found as the effective gate dielectric for graphene field effect transistor which improves mobility
V. B. Sahu, P. G. Pawar, A. Gajarushi
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Energy distribution of positive charges in high-k dielectric
Microelectronics Reliability, 2014Abstract A probing technique to obtain the energy distribution of positive charges in high-k gate stack dielectrics, both within and beyond the substrate bandgap, has been proposed. The energy distribution of different high-k devices has been investigated and attention has been paid to their differences from the single-layered SiON devices.
Sharifah Wan Muhamad Hatta +7 more
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Solid-State Electronics, 2013
Abstract Atomic layer etching (ALE) has been applied to the high-k dielectric patterning in complementary metal–oxide–semiconductor field effect transistors (CMOSFETs), and its electrical characteristics were compared with those etched by conventional etching such as wet etching (WE) or reactive ion etching (RIE). The CMOSFET etched by the ALE showed
K.S. Min +11 more
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Abstract Atomic layer etching (ALE) has been applied to the high-k dielectric patterning in complementary metal–oxide–semiconductor field effect transistors (CMOSFETs), and its electrical characteristics were compared with those etched by conventional etching such as wet etching (WE) or reactive ion etching (RIE). The CMOSFET etched by the ALE showed
K.S. Min +11 more
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(Invited) TmSiO As a CMOS-Compatible High-k Dielectric
ECS Meeting Abstracts, 2016High-k/metal gate stacks have been a core enabler of CMOS technology for almost a decade, allowing sub-nm equivalent oxide thickness (EOT) while keeping the gate leakage current density at acceptable levels [1]. State-of-the-art high-k/metal gate stacks employ a Hf-based high-k dielectric (typically HfO2) deposited on top of a thin interfacial layer ...
Eugenio Dentoni Litta +2 more
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Hafnium-based high-K dielectrics
IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech)., 2005Hafnium-based high-K dielectrics such as HfO/sub 2/, HfON and HfSiON have attracted a great deal of attention because of their potential for successful integration into CMOS technology. However, channel mobility degradation, charge trapping and reliability are major concerns.
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Epitaxial high-k dielectrics on silicon
The Fifth International Conference on Advanced Semiconductor Devices and Microsystems, 2004. ASDAM 2004., 2005Aggressive reduction in the thickness of SiO2-based gate dielectrics in ULSI devices brings about a number offimdamental problems, the most critical ones being reduced dielectric reliability and exponentially increasing leakage (tunneling) current with decreasing oxide thickness.
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Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765), 2003
We report recent results on the effects of high-temperature forming gas and deuterium anneals on performance and reliability characteristics and the effects of AC and DC stress on bias-temperature instability and time-dependent dielectrics breakdown.
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We report recent results on the effects of high-temperature forming gas and deuterium anneals on performance and reliability characteristics and the effects of AC and DC stress on bias-temperature instability and time-dependent dielectrics breakdown.
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Device Principles of High-K Dielectrics
2006The growth of the semiconductor industr yi nt he last few decades has largely been driven by the growth of integrated circuits (IC) based on complementary metal– oxide–semiconductor (CMOS) technology. CMOS technology uses n-type and p-type field effect transistors (FETs) to produce digita ll ogi ce lements that are superior to other available logic ...
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