Numerical Investigation of Transient Breakdown Voltage Enhancement in SOI LDMOS by Using a Step P-Type Doping Buried Layer [PDF]
Micromachines, 2023 In this paper, the transient breakdown voltage (TrBV) of a silicon-on-insulator (SOI) laterally diffused metal-oxide-semiconductor (LDMOS) device was increased by introducing a step P-type doping buried layer (SPBL) below the buried oxide (BOX).
Xiaoming Yang +4 more
doaj +2 more sources
A TCAD Study on High-Voltage Superjunction LDMOS with Variable-K Dielectric Trench [PDF]
Micromachines, 2022 In this paper, a novel high voltage superjunction lateral double diffused MOSFETs (SJ-LDMOS) using a variable high permittivity (VHK) dielectric trench is presented.
Zhen Cao +5 more
doaj +2 more sources
A Trench Heterojunction Diode-Integrated 4H-SiC LDMOS with Enhanced Reverse Recovery Characteristics [PDF]
MicromachinesIn this paper, a novel 4H-SiC LDMOS structure with a trench heterojunction in the source (referred as to THD-LDMOS) is proposed and investigated for the first time, to enhance the reverse recovery performance of its parasitic diode. Compared with 4H-SiC,
Yanjuan Liu, Fangfei Bai, Junpeng Fang
doaj +2 more sources
A FIN-LDMOS with Bulk Electron Accumulation Effect. [PDF]
Micromachines (Basel), 2023 A thin Silicon-On-Insulator (SOI) LDMOS with ultralow Specific On-Resistance (Ron,sp) is proposed, and the physical mechanism is investigated by Sentaurus. It features a FIN gate and an extended superjunction trench gate to obtain a Bulk Electron Accumulation (BEA) effect.
Chen W, Duan Z, Zhang H, Han Z, Wang Z.
europepmc +4 more sources
Design of dual-band power amplifier using bandstop filter and dual-mode bias circuit for multistandard transceiver systems [PDF]
Scientific Reports, 2023 This paper presents a dual-band power amplifier (PA) using a meandered line bandstop filter (BSF). An important challenge addressed in this design is to achieve proper isolation between the operational bands of the amplifier.
Sepehr Zarghami, Mohsen Hayati
doaj +2 more sources
Ultra-Low Specific On-resistance Lateral Double-Diffused Metal-Oxide-Semiconductor Transistor with Enhanced Dual-Gate and Partial P-buried Layer [PDF]
Nanoscale Research Letters, 2019 An ultra-low specific on-resistance (R on,sp) lateral double-diffused metal-oxide-semiconductor transistor (LDMOS) with enhanced dual-gate and partial P-buried layer is proposed and investigated in this paper.
Zhuo Wang +5 more
doaj +2 more sources
Fast physical models for Si LDMOS power transistor characterization [PDF]
2011 IEEE MTT-S International Microwave Symposium, 2007 A new nonlinear, process-oriented, quasi-two-dimensional (Q2D) model is described for microwave laterally diffused MOS (LDMOS) power transistors. A set of one-dimensional energy transport equations are solved across a two-dimensional cross-section in a ...
Everett, JP +6 more
core +5 more sources
Enhancement of Electrical Safe Operation Area of 60 V nLDMOS by Engineering of Reduced Surface Electrical Field in the Drift Region [PDF]
MicromachinesTo enhance the electrical safe operation area (eSOA) of laterally diffused metal oxide semiconductor (LDMOS) transistors, a novel reduced surface electric field (Resurf) structure in the n-drift region is proposed, which was fabricated by ion ...
Lianjie Li +3 more
doaj +2 more sources
Results in Physics, 2022 This paper investigates the double dielectrics enhancement LDMOS (DDE LDMOS) with high-k field dielectric and low-k buried dielectric. The analytical models of the potential and electric field, optimal breakdown voltage and drift doping concentration are
Jiafei Yao +8 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2021 A novel Si/SiC heterojunction Lateral Double-diffused Metal Oxide Semiconductor with the Semi-Insulating Polycrystalline Silicon field plate (SIPOS Si/SiC LDMOS) is proposed in this paper for the first time.
Baoxing Duan +3 more
doaj +1 more source