Results 21 to 30 of about 3,588 (218)
Fast physical models for LDMOS power transistor characterization [PDF]
A new quasi-two-dimensional (Q2D) model is described for microwave laterally diffused MOS (LDMOS) power transistors. A set of one-dimensional energy transport equations are solved across a two-dimensional cross-section in a “current-driven” form. This process-oriented nonlinear model accounts for thermal effects, avalanche breakdown and gate conduction.
Everett, JP +6 more
openaire +6 more sources
Enhancement of Electrical Safe Operation Area of 60 V nLDMOS by Engineering of Reduced Surface Electrical Field in the Drift Region [PDF]
To enhance the electrical safe operation area (eSOA) of laterally diffused metal oxide semiconductor (LDMOS) transistors, a novel reduced surface electric field (Resurf) structure in the n-drift region is proposed, which was fabricated by ion ...
Lianjie Li +3 more
doaj +2 more sources
Design of LDMOS Device Modeling Method Based on Neural Network. [PDF]
The rapid development of power semiconductor devices is helping to realize a low‐carbon society and provide a better life for everyone. Power semiconductors not only are used in many large‐scale industrial control fields such as power transmission and control in power grids, rail transit traction systems, and defense weapons and equipment, but also ...
Liu T +5 more
europepmc +2 more sources
Design Tradeoff of Hot Carrier Immunity and Robustness in LDMOS with Grounded Gate Shield
LDMOS devices with grounded gate shield structures variations were simulated and tested, aiming to address hot carrier immunity and robustness concurrently.
Haifeng Mo, Yaohui Zhang, Helun Song
doaj +2 more sources
DC Characteristics Optimization of a Double G-Shield 50 V RF LDMOS
An N-type 50 V RF LDMOS with a RESURF (reduced surface field) structure of dual field plates (grounded shield, or G-shield) was investigated. The effect of the two field plates and N-drift region, including the junction depth and dopant concentration, on
Xiangming Xu +7 more
doaj +2 more sources
A Neural Recording and Stimulation Chip with Artifact Suppression for Biomedical Devices. [PDF]
This paper presents chip implementation of the integrated neural recording and stimulation system with stimulation‐induced artifact suppression. The implemented chip consists of low‐power neural recording circuits, stimulation circuits, and action potential detection circuits.
Liu X, Li J, Chen T, Wang W, Je M.
europepmc +2 more sources
A novel Si/SiC heterojunction Lateral Double-diffused Metal Oxide Semiconductor with the Semi-Insulating Polycrystalline Silicon field plate (SIPOS Si/SiC LDMOS) is proposed in this paper for the first time.
Baoxing Duan +3 more
doaj +1 more source
Research and design of high voltage radiation hardened lateral diffused metal oxide semiconductor
Lateral diffused metal oxide semiconductors (LDMOS) used in power management integrated circuits demonstrate low anti-radiation performance. To address this issue, a high voltage radiation hardened LDMOS structure was studied, and an N-LDMOS device with ...
CHU Fei +4 more
doaj +1 more source
Ultrahigh brightness organic light‐emitting diodes (OLEDs) with highly directional emission are developed and optimized. Analysis of the generated photon flux and device stability indicates that these OLEDs can be useful as light sources in future complementary metal‐oxide‐semiconductor (CMOS) integrated visual prosthetics that serve as light ...
Sabina Hillebrandt +7 more
wiley +1 more source
The authors’ present a LDMOSFET with β‐Ga2O3 for increasing breakdown voltage and power figure of merit. The β‐LDMOSFET structure outperforms performance in the VBR, increasing it to 500 versus 84.4 V in a standard LDMOSFET design. The suggested β‐LDMOSFET has RON ∼ 2.3 m & ohm; cm−2 and increased the PFOM (VBR2/RON) to 108.6 MW/cm2.
Nesa Abedi Rik +2 more
wiley +1 more source

