Results 11 to 20 of about 2,599 (207)
Design of a Novel W-Sinker RF LDMOS [PDF]
A novel RF LDMOS device structure and corresponding manufacturing process are presented in this paper. Deep trench W-sinker (tungsten sinker) is employed in this technology to replace the traditional heavily doped diffusion sinker which can shrink chip ...
Xiangming Xu +10 more
doaj +3 more sources
Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates
A novel trench SOI LDMOS with centrosymmetric double vertical field plates structure (CDVFPT SOI LDMOS) is proposed in this paper. The 2-D device simulator MEDICI is used to investigate the characteristics of the proposed structure.
Jianmei Lei +8 more
doaj +2 more sources
In order to achieve a high breakdown voltage (BV) for the SOI (Silicon-On-Insulator) power device in high voltage ICs, a novel high voltage n-channel lateral double-diffused MOS (LDMOS) with a lateral variable interface doping profile (LVID) placed at ...
Jingjing Jin +7 more
doaj +2 more sources
Design of LDMOS Device Modeling Method Based on Neural Network. [PDF]
The rapid development of power semiconductor devices is helping to realize a low‐carbon society and provide a better life for everyone. Power semiconductors not only are used in many large‐scale industrial control fields such as power transmission and control in power grids, rail transit traction systems, and defense weapons and equipment, but also ...
Liu T +5 more
europepmc +2 more sources
LDMOS–SCR: a replacement for LDMOS with high ESD self-protection ability for HV application
A study of LDMOS–SCR devices for SOI BCD technology is presented. The LDMOS–SCR is fully compatible with BCD process and can replace the LDMOS as a high voltage output driver. By comparison of the LDMOS and another 'pnpn' type of LDMOS–SCR, the triggering mechanism and ESD behavior are well discussed with both device simulation and TLP measurement.
Peng Zhang +3 more
openaire +2 more sources
Design Tradeoff of Hot Carrier Immunity and Robustness in LDMOS with Grounded Gate Shield
LDMOS devices with grounded gate shield structures variations were simulated and tested, aiming to address hot carrier immunity and robustness concurrently.
Haifeng Mo, Yaohui Zhang, Helun Song
doaj +2 more sources
Mismatch sources in LDMOS devices [PDF]
This paper discusses the influence of different sources of DC parametric mismatch in an LDMOS. By comparing measurements and statistical simulations the impact on mismatch of the most important fluctuation causes is qualitatively evaluated. We demonstrate that, whereas the shape of the doping profile in the channel has little effect, both interface ...
Andricciola, Pietro +2 more
openaire +5 more sources
DC Characteristics Optimization of a Double G-Shield 50 V RF LDMOS
An N-type 50 V RF LDMOS with a RESURF (reduced surface field) structure of dual field plates (grounded shield, or G-shield) was investigated. The effect of the two field plates and N-drift region, including the junction depth and dopant concentration, on
Xiangming Xu +7 more
doaj +2 more sources
A Neural Recording and Stimulation Chip with Artifact Suppression for Biomedical Devices. [PDF]
This paper presents chip implementation of the integrated neural recording and stimulation system with stimulation‐induced artifact suppression. The implemented chip consists of low‐power neural recording circuits, stimulation circuits, and action potential detection circuits.
Liu X, Li J, Chen T, Wang W, Je M.
europepmc +2 more sources
Ultrahigh brightness organic light‐emitting diodes (OLEDs) with highly directional emission are developed and optimized. Analysis of the generated photon flux and device stability indicates that these OLEDs can be useful as light sources in future complementary metal‐oxide‐semiconductor (CMOS) integrated visual prosthetics that serve as light ...
Sabina Hillebrandt +7 more
wiley +1 more source

