Results 31 to 40 of about 3,588 (218)

A Process Optimization Method of the Mini‐LOCOS Field Plate Profile for Improving Electrical Characteristics of LDMOS Device

open access: yesIET Circuits, Devices &Systems, Volume 2023, Issue 1, 2023., 2023
In this work, the effects of the mini‐local oxidation of silicon (LOCOS) field plate’s bottom physical profile on the devices’ breakdown performance are analyzed through technology computer‐aided design simulations. It is indicated that the “abrupt” bottom profile could certainly do with an optimization.
Shaoxin Yu   +6 more
wiley   +1 more source

1.2 kV 4H‐SiC planar power MOSFETs with a low‐K dielectric in central gate

open access: yesIET Circuits, Devices &Systems, Volume 16, Issue 5, Page 419-426, August 2022., 2022
Abstract A 1.2 kV 4H‐SiC planar power MOSFET with a low‐K dielectric in central gate (LK‐MOS) is proposed in this paper. The LK‐MOS features a P+ shielding region and a thick low‐K dielectric layer under the central gate. The insulation layer capacitance is reduced by the thick low‐K dielectric, while the depletion layer capacitance is decreased due to
Dong Liu   +6 more
wiley   +1 more source

Research on Silicon‐Based Terahertz Communication Integrated Circuits

open access: yesChinese Journal of Electronics, Volume 31, Issue 3, Page 516-533, May 2022., 2022
With the increasing number of users and emerging new applications, the demand for mobile data traffic is growing rapidly. The limited spectrum resources of the traditional microwave and millimeter‐wave frequency bands can no longer support the future wireless communication systems with higher system capacity and data throughput.
Peigen ZHOU   +10 more
wiley   +1 more source

Mismatch sources in LDMOS devices [PDF]

open access: yes2010 Proceedings of the European Solid State Device Research Conference, 2010
This paper discusses the influence of different sources of DC parametric mismatch in an LDMOS. By comparing measurements and statistical simulations the impact on mismatch of the most important fluctuation causes is qualitatively evaluated. We demonstrate that, whereas the shape of the doping profile in the channel has little effect, both interface ...
Andricciola, Pietro   +2 more
openaire   +2 more sources

A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer [PDF]

open access: yes, 1994
This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ buried layer as an effective device substrate.
Van Calster, A.   +2 more
core   +7 more sources

Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates

open access: yesResults in Physics, 2019
A novel trench SOI LDMOS with centrosymmetric double vertical field plates structure (CDVFPT SOI LDMOS) is proposed in this paper. The 2-D device simulator MEDICI is used to investigate the characteristics of the proposed structure.
Jianmei Lei   +8 more
doaj   +1 more source

Novel SiC/Si heterojunction LDMOS with electric field modulation effect by reversed L-shaped field plate

open access: yesResults in Physics, 2020
A novel SiC/Si heterojunction lateral double-diffused metal-oxidesemiconductor (LDMOS) with a reversed L-shaped field plate and a stepped oxide layer has been proposed to improve the tradeoff between the breakdown voltage (BV) and specific on-resistance (
Qi Li   +8 more
doaj   +1 more source

Enhance the ESD Ability of UHV 300-V Circular LDMOS Components by Embedded SCRs and the Robustness P-Body Well

open access: yesIEEE Journal of the Electron Devices Society, 2021
The ultra-high voltage (UHV) Lateral-diffused MOSFET (LDMOS) transistor has been widely used in power circuit applications and also used as an electrostatic discharge (ESD) self-protection device.
Po-Lin Lin, Shen-Li Chen, Sheng-Kai Fan
doaj   +1 more source

Comparative analysis of VDMOS/LDMOS power transistors for RF amplifiers [PDF]

open access: yes, 2009
A comparison between the RF performance of vertical and lateral power MOSFETs is presented. The role of each parasitic parameter in the assessment of the power gain, 1-dB compression point, efficiency, stability, and output matching is evaluated ...
Chevaux, N., De Souza, M.M.
core   +1 more source

New Super-Junction LDMOS Based on Poly-Si Thin-Film Transistors

open access: yesIEEE Journal of the Electron Devices Society, 2016
A multi-channel super-junction lateral doubled-diffused MOSFET (SJ-LDMOS) that is developed from thin film transistor technology is proposed. To optimize the breakdown voltage (VBD) and to reduce the specific on-resistance (RSP), a new structure called ...
Jhen-Yu Tsai, Hsin-Hui Hu
doaj   +1 more source

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