Results 51 to 60 of about 1,991 (213)

Channel Length Optimization for Planar LDMOS Field-Effect Transistors for Low-Voltage Power Applications

IEEE Journal of the Electron Devices Society, 2020
We identify an optimum channel length for planar Laterally Diffused Metal-Oxide-Semiconductor (LDMOS) field-effect transistors, in terms of the specific on-resistance, through systematic device simulation and optimization.
Ali Saadat, Maarten L. Van De Put, Hal Edwards, William G. Vandenberghe   +3 more
doaj   +1 more source

Automatic optimal design of field plate for silicon on insulator lateral double‐diffused metal oxide semiconductor using simulated annealing algorithm

IET Power Electronics, Volume 17, Issue 4, Page 487-493, 18 March 2024.
In this paper, an automatic optimal design method for field plate (FP) in silicon on insulator lateral double‐diffused metal oxide semiconductor using simulated annealing algorithm is proposed. For a given device structure, the framework can automatically design the FP geometry parameters within the definite range that maximizes the device breakdown ...
Jing Chen, Renji Xia, Jinwen You, Qing Yao, Yuxuan Dai, Jun Zhang, Jiafei Yao, Yufeng Guo   +7 more
wiley   +1 more source

The effect of baseband impedance termination on the linearity of GaN HEMTs [PDF]

, 2010
This paper demonstrates the significant effect of baseband impedance termination on the linearity performance of a 10W GaN HEMT device driven to deliver a peak envelope power of approximately 40dBm. The paper also proposes a further refinement to a state-
Woodington, S., Morris, K., Tasker, P, Cripps, S., Benedikt, J., Carrubba, V, Tasker, P. J., Benedikt, J, Beach, M., Lees, J., Ben Smida, S, Carrubba, V., Akmal, M., Morris, KA, Lees, J, Ben Smida, S., McGeehan, J., Akmal, M, McGeehan, JP, Woodington, S, Cripps, S, Beach, MA   +21 more
core   +1 more source

Analysis of Kirk effect of an innovated high side Side-Isolated N-LDMOS device

MATEC Web of Conferences, 2016
An ESOA of LDMOS device is very critical for power device performance. Kirk effect is the one of the major problem which leads to poor ESOA performance. The cause of the problem mainly due to the high beta value of parasitic NPN transistor in the p-body.
Lai Ciou Jhong, Sheu Gene, Chien Ting Yao, Wu Chieh Chih, Lee Tzu Chieh, Deivasigamani Ravi, Wu Ching Yuan, Chandrashekhar, Yang Shao Ming   +8 more
doaj   +1 more source

Reducing the specific on-resistance for a trench-gate-integrated SOI LDMOS by using the double silicon drift layers

Results in Physics, 2020
Double silicon drift layers are used to reduce the specific on-resistance (Ron,sp) for a trench-gate-integrated lateral double-diffused MOSFET (DDL TG LDMOS) based on SOI technology in this paper.
Yuan Wang, Shengdong Hu, Chang Liu, Jian'an Wang, Han Yang, Shenglong Ran, Jie Jiang, Gang Guo   +7 more
doaj   +1 more source

Electrical current disrupts the electron transfer in defined consortia

Microbial Biotechnology, Volume 17, Issue 1, January 2024.
Abstract Improving methane production through electrical current application to anaerobic digesters has garnered interest in optimizing such microbial electrochemical technologies, with claims suggesting direct interspecies electron transfer (DIET) at the cathode enhances methane yield.
Mon Oo Yee, Lars D. M. Ottosen, Amelia‐Elena Rotaru   +2 more
wiley   +1 more source

Evolution of Black‐Box Models Based on Volterra Series

Journal of Applied Mathematics, Volume 2015, Issue 1, 2015., 2015
This paper presents a historical review of the many behavioral models actually used to model radio frequency power amplifiers and a new classification of these behavioral models. It also discusses the evolution of these models, from a single polynomial to multirate Volterra models, presenting equations and estimation methods.
Daniel D. Silveira, Thiago V. N. Coelho, Alexandre Bessa dos Santos, Zhiwei Gao   +3 more
wiley   +1 more source

A Single-Event Burnout Hardened Super-Junction Trench SOI LDMOS with Additional Hole Leakage Paths [PDF]

, 2022
In this paper, a novel super-junction trench silicon-on-insulator laterally-diffused metal-oxide-semiconductor (SJT SOI LDMOS) power device with additional hole leakage paths to improve single-event burnout (SEB) performance under high liner energy ...
Zhuoxuan Zheng, Mengyao Cui, Lixin Wang, Yuanzhe Li, Yue Wang   +4 more
core   +1 more source

Unclamped Inductive Switching Stress Failure Mechanism of LDMOS [PDF]

, 2013
[[abstract]]The failure mechanism of Unclamped Inductive Switching (UIS) stress on Laterally Diffused MOS (LDMOS) device has been investigated first time. Failure in LDMOS has been compared with the Vertical DMOS.
Kumar, Vijay;Srinat, Grama;Shreyas, Grama Srinath;Khau, Chinmoy;Khaund, Chinmoy;Agarw, Neelam;Agarwal, Neelam;Nidhi, Karuna;Nidhi, Karuna;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
core  

Distortion correction of LDMOS power amplifiers using hybrid RF second harmonic injection/digital predistortion linearization [PDF]

, 2006
An LDMOS RF power amplifier for RF multichannel wireless systems with improved IMD performance characteristics is presented. The application of two combined linearization methods is being tested with the help of circuit simulation software ADS.
Budimir, D., Koulouzis, H.
core   +1 more source