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TCAD degradation modeling for LDMOS transistors

2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2012
Physically-based models of hot-carrier stress and dielectric field-enhanced thermal damage have been incorporated in the framework of a TCAD tool with the aim of investigating the electrical stress degradation in integrated power devices over an extended range of stress biases and ambient temperatures.
REGGIANI, SUSANNA   +7 more
openaire   +1 more source

SLOP-LDMOS - A novel super-junction concept LDMOS and its experimental demonstration

Proceedings. 2005 International Conference on Communications, Circuits and Systems, 2005., 2005
In this paper, a novel surface low on-resistance path lateral double-diffusion MOSFET (SLOP-LDMOS), based on the super junction (SJ) concept, is presented and experimentally demonstrated for the first time. The key feature of this new structure is that the super junction primarily provides the low on-resistance path and it is just located at the ...
null Bo Zhang   +3 more
openaire   +1 more source

An Application of LDMOS on ESD Protection

2020 China Semiconductor Technology International Conference (CSTIC), 2020
This paper focuses on the application of a LDMOS ESD protection method. The application is by tuning the size of poly cover field oxide. It needn't extra process step. This way can reduce the breakdown voltage. When ESD is coming, this device can turn on first, then protect the core the Chip.
Li Wang, Yu Chen, Hualun Chen
openaire   +1 more source

A compact model for the current in LDMOS transistors

2017 IEEE International Conference on Electro Information Technology (EIT), 2017
In this paper, a closed-form physics-based surface potential approach is proposed to derive a compact model for current in high-frequency and high-power LDMOS transistors. For this purpose, we have modeled the drift region with three variable resistors.
Hojjat Keshtkar   +2 more
openaire   +1 more source

A New Vertical Channel LDMOS

Physica Scripta, 2002
A new vertical channel LDMOS, which decreases the on-resistance without sacrificing the breakdown voltage, is proposed and verified by numerical simulation. In the proposed vertical channel LDMOS, the channel and the drift region are located in the trench between the source and the drain. The total cell pitch of the proposed device is decreased to 4 μm
Seung-Chul Lee   +3 more
openaire   +1 more source

Improvement of LDMOS MMICs compactness

2016 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications (PAWR), 2016
This paper describes an innovative mean of realizing input matching networks for LDMOS MMICs, by using a very compact broadband transformer balun, which is integrated in the input matching network, in the active device gate plane instead of the 50 ohms port.
Sullivan Plet   +2 more
openaire   +1 more source

Hot carrier reliability in LDMOS devices

2017 IEEE 12th International Conference on ASIC (ASICON), 2017
This paper discusses hot carrier (HC) reliability in LDMOS devices. First we review various HC degradation mechanisms for LDMOS devices. Then we discuss how to reduce HC degradation in LDMOS devices.
openaire   +1 more source

A hybrid VIGBT-LDMOS transistor

IEEE Transactions on Electron Devices, 1988
A hybrid VIGBT-LDMOS transistor which consists of a VIGBT (vertical insulated-gate bipolar transistor) path with a lateral DMOSFET path, implemented in a 300-V, p-channel version, has been demonstrated. The device can be operated with series resistors attached to either the collector or the drain terminals.
T.P. Chow, B.J. Baliga
openaire   +1 more source

A novel trench gate LDMOS

2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676), 2004
In this paper a novel trench gate lateral double diffused MOSFET (TG-LDMOS) device will be discussed and compared to the conventional LDMOS structure. Currently, the LDMOS devices are the preferred technology for base station amplifiers and in Power MOSFET switching applications.
openaire   +1 more source

Interdigitated LDMOS

2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD), 2013
null Jaejune Jang   +10 more
openaire   +1 more source

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