Results 11 to 20 of about 3,543 (201)
In this study, design considerations of a new device structure are presented to improve the self‐heating effect (SHE) and the breakdown voltage of the Deep Gate LDMOS (Lateral Double Diffused Metal Oxide Semiconductor) transistor and compared with a ...
Amir Gavoshani, Ali A. Orouji
doaj +2 more sources
In order to achieve a high breakdown voltage (BV) for the SOI (Silicon-On-Insulator) power device in high voltage ICs, a novel high voltage n-channel lateral double-diffused MOS (LDMOS) with a lateral variable interface doping profile (LVID) placed at ...
Jingjing Jin +7 more
doaj +2 more sources
Design of a Novel W-Sinker RF LDMOS
A novel RF LDMOS device structure and corresponding manufacturing process are presented in this paper. Deep trench W-sinker (tungsten sinker) is employed in this technology to replace the traditional heavily doped diffusion sinker which can shrink chip ...
Xiangming Xu +10 more
doaj +2 more sources
Design of LDMOS Device Modeling Method Based on Neural Network. [PDF]
The rapid development of power semiconductor devices is helping to realize a low‐carbon society and provide a better life for everyone. Power semiconductors not only are used in many large‐scale industrial control fields such as power transmission and control in power grids, rail transit traction systems, and defense weapons and equipment, but also ...
Liu T +5 more
europepmc +2 more sources
Design Tradeoff of Hot Carrier Immunity and Robustness in LDMOS with Grounded Gate Shield
LDMOS devices with grounded gate shield structures variations were simulated and tested, aiming to address hot carrier immunity and robustness concurrently.
Haifeng Mo, Yaohui Zhang, Helun Song
doaj +2 more sources
DC Characteristics Optimization of a Double G-Shield 50 V RF LDMOS
An N-type 50 V RF LDMOS with a RESURF (reduced surface field) structure of dual field plates (grounded shield, or G-shield) was investigated. The effect of the two field plates and N-drift region, including the junction depth and dopant concentration, on
Xiangming Xu +7 more
doaj +2 more sources
A Neural Recording and Stimulation Chip with Artifact Suppression for Biomedical Devices. [PDF]
This paper presents chip implementation of the integrated neural recording and stimulation system with stimulation‐induced artifact suppression. The implemented chip consists of low‐power neural recording circuits, stimulation circuits, and action potential detection circuits.
Liu X, Li J, Chen T, Wang W, Je M.
europepmc +2 more sources
Research and design of high voltage radiation hardened lateral diffused metal oxide semiconductor
Lateral diffused metal oxide semiconductors (LDMOS) used in power management integrated circuits demonstrate low anti-radiation performance. To address this issue, a high voltage radiation hardened LDMOS structure was studied, and an N-LDMOS device with ...
CHU Fei +4 more
doaj +1 more source
Ultrahigh brightness organic light‐emitting diodes (OLEDs) with highly directional emission are developed and optimized. Analysis of the generated photon flux and device stability indicates that these OLEDs can be useful as light sources in future complementary metal‐oxide‐semiconductor (CMOS) integrated visual prosthetics that serve as light ...
Sabina Hillebrandt +7 more
wiley +1 more source
The authors’ present a LDMOSFET with β‐Ga2O3 for increasing breakdown voltage and power figure of merit. The β‐LDMOSFET structure outperforms performance in the VBR, increasing it to 500 versus 84.4 V in a standard LDMOSFET design. The suggested β‐LDMOSFET has RON ∼ 2.3 m & ohm; cm−2 and increased the PFOM (VBR2/RON) to 108.6 MW/cm2.
Nesa Abedi Rik +2 more
wiley +1 more source

