Results 21 to 30 of about 3,543 (201)
In this work, the effects of the mini‐local oxidation of silicon (LOCOS) field plate’s bottom physical profile on the devices’ breakdown performance are analyzed through technology computer‐aided design simulations. It is indicated that the “abrupt” bottom profile could certainly do with an optimization.
Shaoxin Yu +6 more
wiley +1 more source
1.2 kV 4H‐SiC planar power MOSFETs with a low‐K dielectric in central gate
Abstract A 1.2 kV 4H‐SiC planar power MOSFET with a low‐K dielectric in central gate (LK‐MOS) is proposed in this paper. The LK‐MOS features a P+ shielding region and a thick low‐K dielectric layer under the central gate. The insulation layer capacitance is reduced by the thick low‐K dielectric, while the depletion layer capacitance is decreased due to
Dong Liu +6 more
wiley +1 more source
Research on Silicon‐Based Terahertz Communication Integrated Circuits
With the increasing number of users and emerging new applications, the demand for mobile data traffic is growing rapidly. The limited spectrum resources of the traditional microwave and millimeter‐wave frequency bands can no longer support the future wireless communication systems with higher system capacity and data throughput.
Peigen ZHOU +10 more
wiley +1 more source
Mismatch sources in LDMOS devices [PDF]
This paper discusses the influence of different sources of DC parametric mismatch in an LDMOS. By comparing measurements and statistical simulations the impact on mismatch of the most important fluctuation causes is qualitatively evaluated. We demonstrate that, whereas the shape of the doping profile in the channel has little effect, both interface ...
Andricciola, Pietro +2 more
openaire +2 more sources
An LDMOS VHF class-E power amplifier using a high-Q novel variable inductor [PDF]
In this paper, an lateral diffused metal-oxide-semiconductor-based very high-frequency class-E power amplifier has been investigated theoretically and experimentally.
Rutledge, David B., Zirath, Herbert
core +2 more sources
Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates
A novel trench SOI LDMOS with centrosymmetric double vertical field plates structure (CDVFPT SOI LDMOS) is proposed in this paper. The 2-D device simulator MEDICI is used to investigate the characteristics of the proposed structure.
Jianmei Lei +8 more
doaj +1 more source
A novel SiC/Si heterojunction lateral double-diffused metal-oxidesemiconductor (LDMOS) with a reversed L-shaped field plate and a stepped oxide layer has been proposed to improve the tradeoff between the breakdown voltage (BV) and specific on-resistance (
Qi Li +8 more
doaj +1 more source
When self-consistency makes a difference [PDF]
Compound semiconductor power RF and microwave device modeling requires, in many cases, the use of selfconsistent electrothermal equivalent circuits.
Bonani, Fabrizio +5 more
core +1 more source
New Super-Junction LDMOS Based on Poly-Si Thin-Film Transistors
A multi-channel super-junction lateral doubled-diffused MOSFET (SJ-LDMOS) that is developed from thin film transistor technology is proposed. To optimize the breakdown voltage (VBD) and to reduce the specific on-resistance (RSP), a new structure called ...
Jhen-Yu Tsai, Hsin-Hui Hu
doaj +1 more source
The ultra-high voltage (UHV) Lateral-diffused MOSFET (LDMOS) transistor has been widely used in power circuit applications and also used as an electrostatic discharge (ESD) self-protection device.
Po-Lin Lin, Shen-Li Chen, Sheng-Kai Fan
doaj +1 more source

