A Zero-Cost Technique to Improve ON-State Performance and Reliability of Power LDMOS Transistors
IEEE Journal of the Electron Devices Society, 2021 In this paper, we have proposed a simple and zero-cost technique to improve ON-state and reliability performance of LDMOS transistors. We introduced doping gradient in the channel by optimizing position of the P-Well mask during test structure design ...
Kumari Neeraj Kaushal +1 more
doaj +1 more source
Distortion correction of LDMOS power amplifiers using hybrid RF second harmonic injection/digital predistortion linearization [PDF]
, 2006 An LDMOS RF power amplifier for RF multichannel wireless systems with improved IMD performance characteristics is presented. The application of two combined linearization methods is being tested with the help of circuit simulation software ADS.
Budimir, D. +3 more
core +1 more source
A new tightly-coupled transient electro-thermal simulation method for power electronics [PDF]
, 2016 Paper no. 224This paper presents a new transient electro-thermal (ET) simulation method for fast 3D chip-level analysis of power electronics with field solver accuracy.
Chen, Q, Schoenmaker, W
core +1 more source
AIP Advances, 2017 The use of contact etching stop layer (CESL) stressors is a popular technique for introducing stress into a transistor channel. However, when tensile stress is applied to an n-type lateral double-diffused metal-oxide-semiconductor ...
Xiangzhan Wang +5 more
doaj +1 more source
Algorithmic Optimization of Transistors Applied to Silicon LDMOS
IEEE Access, 2023 We propose a pioneering approach that integrates optimization algorithms and technology computer-aided design to automatically optimize laterally-diffused metal-oxide-semiconductors (LDMOS) with a field-oxide structure.
Ping-Ju Chuang +4 more
doaj +1 more source
The impact of repetitive unclamped inductive switching on the electrical parameters of low-voltage trench power nMOSFETs [PDF]
, 2010 The impact of hot-carrier injection (HCI) due to repetitive unclamped inductive switching (UIS) on the electrical performance of low-voltage trench power n-type MOSFETs (nMOSFETs) is assessed.
Alatise, Olayiwola M. +7 more
core +1 more source
Improving Linearity and Robustness of RF LDMOS by Mitigating Quasi‐Saturation Effect
Active and Passive Electronic Components, Volume 2019, Issue 1, 2019., 2019 This paper discusses linearity and robustness together for the first time, disclosing a way to improve them. It reveals that the nonlinear transconductance with device working at quasi‐saturation region is significant factor of device linearity. The peak electric field is the root cause of electron velocity saturation.
Haifeng Mo +3 more
wiley +1 more source
Comparative study of RESURF Si/SiC LDMOSFETs for high-temperature applications using TCAD modeling [PDF]
, 2017 This paper analyses the effect of employing an Si on semi-insulating SiC (Si/SiC) device architecture for the implementation of 600-V LDMOSFETs using junction isolation and dielectric isolation reduced surface electric field technologies for high ...
Chan, Chun Wa +4 more
core +1 more source
A Novel p-LDMOS Additionally Conducting Electrons by Control ICs
IEEE Journal of the Electron Devices Society, 2019 A silicon-on-insulator (SOI) p-channel lateral double-diffused MOSFET (p-LDMOS), conducting not only holes but also electrons, is proposed and investigated by TCAD simulations. Its most important advantage is the greatly improved relationship between the
Songnan Guo, Xing Bi Chen
doaj +1 more source
Improved Reactance-Compensation Technique for the Design of Wideband Suboptimum Class-E Power Amplifiers [PDF]
, 2015 A reactance-compensation technique has been introduced recently for the design of wideband class-E power amplifiers (PAs). With this technique, the load resistance can be transformed to an optimal complex drain impedance in a broad frequency band.
Morris, Kevin +3 more
core +2 more sources