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Flash-memories in Space Applications: Trends and Challenges [PDF]

open access: yes, 2009
Nowadays space applications are provided with a processing power absolutely overcoming the one available just a few years ago. Typical mission-critical space system applications include also the issue of solid-state recorder(s).
Caramia, M.   +3 more
core  

Dependability Assessment of NAND Flash-memory for Mission-critical Applications [PDF]

open access: yes
It is a matter of fact that NAND flash memory devices are well established in consumer market. However, it is not true that the same architectures adopted in the consumer market are suitable for mission critical applications like space.
Fabiano, Michele
core  

Leveraging the page buffer data cache for enhanced programmability in NAND flash memories with on‐chip microcontrollers

open access: yesElectronics Letters
This paper proposes a simple yet effective scheme for NAND Flash memories that employ on‐chip microcontroller units (MCUs) to manage internal array operations.
Geonu Kim
doaj   +1 more source

Protograph QC-LDPC and Rate-Adaptive Polar Codes Design for MLC NAND Flash Memories

open access: yesIEEE Access, 2019
A protograph-based quasi-cyclic (QC) low-density parity-check (LDPC) code for multi-level cell (MLC) NAND flash memories is proposed in this paper. In this design approach, the quantized voltage signals are measured for soft decoding because the exact ...
Lingjun Kong   +3 more
doaj   +1 more source

Estimation method for bit upset ratio of NAND flash memory induced by heavy ion irradiation

open access: yesAIP Advances
In order to estimate the bit upset ratio of NAND flash memory induced by heavy ion irradiation, starting from the physical mechanism of the bit upset of NAND flash memory, an analytical model based on statistical methods was developed to describe the ...
Jiangkun Sheng   +9 more
doaj   +1 more source

A TID and SEE Characterization of Multi-Terabit COTS 3D NAND Flash [PDF]

open access: yes
Single-event effects and total ionizing dose testing is described for a 32-layer NAND flash memory, in both SLC and MLC configurations, with special considerations for unique three-dimensional test ...
Campola, Michael J., Wilcox, Edward P.
core   +1 more source

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