Results 81 to 90 of about 29,727 (252)

Ising Solver Using Vertical NAND Flash Memory

Advanced Intelligent Systems, EarlyView.
Commercial V‐NAND flash memory is repurposed as a discrete‐time Ising solver by exploiting in‐memory current summation and read‐voltage‐controlled intrinsic noise. The system implements Hopfield neural‐network updates with simulated‐annealing‐like behavior, solving max‐cut problems with high accuracy and energy efficiency while using mass‐produced ...
Sung‐Ho Park, Yeongheon Yang, Jong‐Won Back, Jiseong Im, Ryun‐Han Koo, Jonghyun Ko, Dongseok Kwon, Jong‐Ho Lee   +7 more
wiley   +1 more source

Keggin‐Type Aluminum Polyoxometalate‐Mediated Oxidation of Amorphous Carbon for Engineered Electrochemical Interfaces

Carbon Energy, EarlyView.
Keggin‐type Al‐POM‐coated silica achieves selective surface oxidation of amorphous carbon through electrostatic attraction and proton‐coupled oxidation, tailoring interfacial properties for lithium‐ion batteries and semiconductor processes. ABSTRACT Amorphous carbon is widely used in energy storage and semiconductor technologies, where surface ...
Ganggyu Lee, Dongmin Kang, Sumin Hong, Hongjun Park, Myungju Woo, Woojin Jeong, Giha Lee, Junsang Lee, Sangkyun Kim, Jea‐Gun Park, Takamasa Mori, Yehwan Kim, Taeseup Song, Ungyu Paik   +13 more
wiley   +1 more source

Experimental Investigation of Threshold Voltage Temperature Effect During Cross-Temperature Write–Read Operations in 3-D NAND Flash

IEEE Journal of the Electron Devices Society, 2021
Reading data at a temperature which different from writing can cause a large number of failed bits in 3D NAND Flash memory. In this work, the threshold voltage (Vth) temperature effect of 3D NAND flash memory cell was investigated and a method was ...
Dan Wu, Hailong You, Xiaoguang Wang, Shujing Zhong, Qi Sun   +4 more
doaj   +1 more source

Physical Unclonable Function Based on 3D‐NAND Flash Array Structure With Multi‐Chip Implementation

Small, EarlyView.
Physical unclonable function (PUF) based on a 3D‐NAND flash array is proposed, featuring a multi‐chip structure and a massive challenge–response pair (CRP) capacity. The presented utilizes intrinsic string current variations experimentally verified across eight fabricated 48 × 24 NAND flash arrays.
Hwiho Hwang, Sangwook Youn, Jinwoo Park, Dayeon Yu, Hyungjin Kim   +4 more
wiley   +1 more source

Reliability challenges in 3D NAND Flash memories

, 2019
The reliability of 3D NAND Flash memory technology is depending on many factors. Most of them are related to the process-induced variability of the layers. Endurance, data retention capabilities, and cross-temperature immunity are the metrics that become
Cristian Zambelli, Rino Micheloni, Micheloni R., Olivo P., Piero Olivo, Zambelli C.   +5 more
core   +1 more source

An Efficient Dynamic Hash Index Structure for NAND Flash Memory

, 2009
We propose an efficient dynamic hash index structure suitable for a NAND flash memory environment. Since write operations incur significant overhead in NAND flash memory, our design of index structure focuses on minimizing the number of write operations ...
Myoung Ho KIM, Yang, Chul-Woong, Lee, Ki Yong, Ki Yong LEE, Lee, Yoon Joon, Kim, Myoung Ho, Chul-Woong YANG, Yoon-Joon LEE   +7 more
core   +1 more source

Evolution of Materials and Device Stacks for HfO2‐Based Ferroelectric Memories

Advanced Materials Interfaces, Volume 13, Issue 11, 9 June 2026.
This review summarizes engineering strategies for HfO2 based ferroelectric memories with focus on FeCAP and FeFET structures. It describes how dopant design, stress effects, and interface engineering improve the bulk ferroelectric response. It further discusses how channel engineering supports reliable memory characteristics and scalable integration ...
Eunjin Kim, Jiyong Woo
wiley   +1 more source

Innovative Threshold‐Changeable Memory Based on Amorphous GeSbSeN

physica status solidi (RRL) – Rapid Research Letters, Volume 20, Issue 6, June 2026.
Threshold‐Changeable Memory (TCM) operation is demonstrated in amorphous GeSbSeN alloys through optimized polarity‐dependent programming. Sb and N compositional tuning, drift analysis, activation‐energy extraction, and temperature‐dependent measurements reveal how elemental composition governs memory window, threshold‐voltage stability, and programming
Mohamad Kanaan, Renzo Antonelli, Massimo Borghi, Jean Rottner, Mathieu Bernard, Guillaume Bourgeois, Sylvain Gout, Antoine Salvi, François Andrieu, Abdelkader Souifi, Simon Jeannot, Gabriele Navarro   +11 more
wiley   +1 more source

Error correction codes in NAND flash memory

, 2016
Error Correction Codes (ECC) are used in NAND Flash memories to detect and correct bit-errors. With shrinking technology nodes and increased memory complexity, bit error rates continue to grow.
Regulapati, Varsha
core   +1 more source

Atomic Layer Deposition in Transistors and Monolithic 3D Integration

Advanced Functional Materials, Volume 36, Issue 41, 21 May 2026.
Transistors are fundamental building blocks of modern electronics. This review summarizes recent progress in atomic layer deposition (ALD) for the synthesis of two‐dimensional (2D) metal oxides and transition‐metal dichalcogenides (TMDCs), with particular emphasis on their enabling role in monolithic three‐dimensional (M3D) integration for next ...
Yue Liu, Taoyu Zou, Cheng‐Yan Xu, Liang Zhen, Yang Li, Yong‐Young Noh   +5 more
wiley   +1 more source