Results 51 to 60 of about 29,884 (210)
Evolution of Materials and Device Stacks for HfO2‐Based Ferroelectric Memories
This review summarizes engineering strategies for HfO2 based ferroelectric memories with focus on FeCAP and FeFET structures. It describes how dopant design, stress effects, and interface engineering improve the bulk ferroelectric response. It further discusses how channel engineering supports reliable memory characteristics and scalable integration ...
Eunjin Kim, Jiyong Woo
wiley +1 more source
Synchronous counter Patent [PDF]
Synchronous counter design incorporating cascaded binary stages driven by previous stages and inputs through NAND ...
Mcdermond, D. K.
core +1 more source
Transducers convert physical signals into electrical and optical representations, yet each mechanism is bounded by intrinsic trade‐offs across bandwidth, sensitivity, speed, and energy. This review maps transduction mechanisms across physical scale and frequency, showing how heterogeneous integration and multiphysics co‐design transform isolated ...
Aolei Xu +8 more
wiley +1 more source
This study investigates the impact of oxide/nitride (ON) pitch scaling on the memory performance of 3D NAND flash memory. We aim to enhance 3D NAND flash memory by systematically reducing the spacer length (Ls) and gate length (Lg) to achieve improved ...
Hee Young Bae +2 more
doaj +1 more source
The switching dynamics of a multiferroic nanomagnetic NAND gate with fan-in/fan-out is simulated by solving the Landau-Lifshitz-Gilbert (LLG) equation while neglecting thermal fluctuation effects.
Atulasimha, Jayasimha +2 more
core +1 more source
Emulating Digital Logic using Transputer Networks (Very High Parallelism = Simplicity = Performance) [PDF]
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a profound impact on the design rules for the controlling software.
Welch, Peter H.
core +2 more sources
Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
We explore the possibilities of designing classical logic gates at nano-scale level using magnetic quantum rings. A single ring is used for designing OR, NOT, XOR, XNOR and NAND gates, while AND and NOR gate responses are achieved using two such rings ...
Maiti, Santanu K.
core +1 more source
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez +12 more
wiley +1 more source
Self-correcting, synchronizing ring counter using integrated circuit devices [PDF]
Three nand gate circuits are used to add error detection and reset logic circuitry for initiating and retaining the correct binary state in the flip-flop circuits of a ring counter.
Maasberg, W. A.
core +1 more source

