Results 11 to 20 of about 8,396,680 (189)
The Scientific World Journal, 2014 We present a simulation study on negative bias temperature instability (NBTI) induced hole trapping in E′ center defects, which leads to depassivation of interface trap precursor in different geometrical structures of high-k PMOSFET gate stacks using the
H. Hussin +4 more
doaj +2 more sources
Design of Negative Bias Temperature Instability (NBTI) Tolerant Register File [PDF]
, 2012 Degradation of transistor parameter values due to Negative Bias Temperature Instability (NBTI) has emerged as a major reliability problem in current and future technology generations. NBTI Aging of a Static Random Access Memory (SRAM) cell leads to a lower noise margin, thereby increasing the failure rate.
Saurabh Kothawade, Kothawade, Saurabh
openaire +3 more sources
Stacked Nanosheet Gate-All-Around Morphotropic Phase Boundary Field-Effect Transistors. [PDF]
Adv Sci (Weinh)This study proposes a material design using ferroelectric‐antiferroelectric mixed‐phase HZO to achieve steep subthreshold swing and non‐hysteretic on‐current enhancement in morphotropic phase boundary field‐effect transistors (MPB‐FETs). For the first time, two‐stacked nanosheet GAA MPB‐FETs with optimized HZO are demonstrated, validating superior ...
Kim S, Kim HM, Kwon KR, Kwon D.
europepmc +2 more sources
Harnessing the Quantum Behavior of Spins on Surfaces
Advanced Materials, Volume 35, Issue 27, July 6, 2023., 2023 By incorporating electron spin resonance capability in spin‐polarized scanning tunneling microscopy, quantum states of individual spins on surfaces can be initialized, controlled, and read out. Individual spins and artificial spin structures built atom‐by‐atom provide new platforms for sensing magnetic interactions, performing quantum operations, and ...
Yi Chen +2 more
wiley +1 more source
Advanced Electronic Materials, Volume 9, Issue 1, January 2023., 2023 In this work, an attractive fabrication method to suppress non‐uniformity of threshold voltage, originated from device down scaling, is proposed. Sequentially formed and double‐layered dielectric of homogeneous SiOx at the back‐channel provides advanced functionality to the conventional material.
Kyung Min Kim +8 more
wiley +1 more source
Impact of negative bias temperature instability on single event transients in scaled logic circuits
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Volume 34, Issue 3, May/June 2021., 2021 Abstract Altering the performance of single transistors and integrated circuits at nominal operating conditions over time, as well as soft errors, are serious reliability issues for integrated CMOS circuits, especially when used in space applications. In principle, the effect of soft errors becomes even more critical if the circuit performance degrades
Ambika Prasad Shah, Michael Waltl
wiley +1 more source
IEEE Journal of the Electron Devices Society, 2021 In this article, we present an experimental study on the impact of post-metallization annealing conditions on the negative-bias temperature instability (NBTI) of Si p-channel fin field-effect transistors (p-FinFETs) with atomic layer deposition tungsten (
Longda Zhou +14 more
doaj +1 more source
Modifying Threshold Voltages to n- and p- Type FinFETs by Work Function Metal Stacks
IEEE Open Journal of Nanotechnology, 2021 High-k metal gate technology improves the performance and reduces the gate leakage current of metal–oxide–semiconductor field-effect transistors (MOSFETs).
Wen-Teng Chang +4 more
doaj +1 more source
Recycled integrated circuit detection using reliability analysis and machine learning algorithms
IET Computers &Digital Techniques, Volume 15, Issue 1, Page 20-35, January 2021., 2021 Abstract The use of counterfeit integrated circuits (ICs) in electronic products decreases its quality and lifetime. Recycled ICs can be detected by the method of aging analysis. Aging is carried out through reliability analysis with the effect of hot carrier injection and bias temperature instability (BTI). In this work, three machine learning methods,
Udaya Shankar Santhana Krishnan +1 more
wiley +1 more source
Investigation of Negative Bias Temperature Instability Effect in Partially Depleted SOI pMOSFET
IEEE Access, 2020 The negative bias temperature instability (NBTI) mechanisms for Core and input/output (I/O) devices from a 130 nm partially-depleted silicon on insulator (PDSOI) technology are investigated.
Chao Peng +6 more
doaj +1 more source