Results 21 to 30 of about 204 (157)
Data-Driven Modeling of Low Frequency Noise Using Capture-Emission Energy Maps
A new approach for modeling low frequency noise is presented to enable the predictions of noise behavior from negative bias temperature instability (NBTI). The noise model is based on a capture-emission energy (CEE) map describing the probability density
Jonghwan Lee
doaj +1 more source
NBTI and Power Reduction Using an Input Vector Control and Supply Voltage Assignment Method
As technology scales, negative bias temperature instability (NBTI) becomes one of the primary failure mechanisms for Very Large Scale Integration (VLSI) circuits.
Peng Sun +4 more
doaj +1 more source
Similarities Between Ionizing Radiation Effects and Negative-Bias Temperature Instability (NBTI) in Mosfet Devices [PDF]
Abstract not Available.
Harold P. Hjalmarson +4 more
openaire +2 more sources
Anti-Interference Low-Power Double-Edge Triggered Flip-Flop Based on C-Elements
When the input signal has been interfered and glitches occur, the power consumption of Double-Edge Triggered Flip-Flops (DETFFs) will significantly increase.
Zhengfeng Huang +6 more
doaj +1 more source
The ageing phenomenon of negative bias temperature instability (NBTI) continues to challenge the dynamic thermal management of modern FPGAs. Increased transistor density leads to thermal accumulation and propagates higher and non-uniform temperature ...
Sohaib Aslam +4 more
doaj +1 more source
An Ageing-Aware and Temperature Mapping Algorithm for Multilevel Cache Nodes
Increase in chip inactivity in the future threatens the performance of many-core systems and therefore, efficient techniques are required for continuous scaling of transistors.
Emmanuel Ofori-Attah +1 more
doaj +1 more source
Impact of negative and positive bias temperature stress on 6T-SRAM cells [PDF]
With introduction of high-k gate oxide materials, the degradation effect <i>Positive Bias Temperature Instability</i> (PBTI) is starting to play an important role.
S. Drapatz +2 more
doaj
We have performed negative bias instability (NBTI) measurements on 130 nm channel length Si MOSFETs with SiON gate dielectrics at different temperatures up to 220 °C. Using a pulsed stressiing and pseudo-DC measurements we have focused on the charging and annealing kinetics of only the interface state related component. At temperatures > 180 °C we
Duc Nguyen +4 more
openaire +2 more sources
Enhancement-mode tri-gate GaN MIS-HEMTs with PEALD-AlN/HfO2 dual-gate dielectric [PDF]
In this study, we demonstrate a PEALD-AlN/HfO2 dual-gate dielectric normally-off GaN high-electron-mobility transistor (HEMT) with a recess-tri-gate architecture.
Rahul Rai +4 more
doaj +1 more source
We examine the impact of negative bias temperature (NBT) stress on the fluctuations in ID and IG for deeply scaled pMOSFETs and find that the relative high NBT stress triggers IG‐RTN and ID‐step. Through the analysis of the field dependence of emission constant and the carrier separation measurement, it is found that under the relative high NBT stress ...
Yiming Liao +4 more
wiley +1 more source

