Results 31 to 40 of about 8,396,680 (189)
Impact of negative and positive bias temperature stress on 6T-SRAM cells [PDF]
Advances in Radio Science, 2009 With introduction of high-k gate oxide materials, the degradation effect <i>Positive Bias Temperature Instability</i> (PBTI) is starting to play an important role.
S. Drapatz +2 more
doaj
ECS Transactions, 2013 We have performed negative bias instability (NBTI) measurements on 130 nm channel length Si MOSFETs with SiON gate dielectrics at different temperatures up to 220 °C. Using a pulsed stressiing and pseudo-DC measurements we have focused on the charging and annealing kinetics of only the interface state related component. At temperatures > 180 °C we
Duc Nguyen +4 more
openaire +2 more sources
Advances in Condensed Matter Physics, Volume 2015, Issue 1, 2015., 2015 We examine the impact of negative bias temperature (NBT) stress on the fluctuations in ID and IG for deeply scaled pMOSFETs and find that the relative high NBT stress triggers IG‐RTN and ID‐step. Through the analysis of the field dependence of emission constant and the carrier separation measurement, it is found that under the relative high NBT stress ...
Yiming Liao +4 more
wiley +1 more source
On the Thermal Activation of Negative Bias Temperature Instability [PDF]
, 2009 The temperature dependence of negative bias temperature instability (NBTI) is investigated on 2.0nm SiO2 devices from temperatures ranging from 300K down to 6K with a measurement window of ~12ms to 100s.
Knowlton, William B. +7 more
core +1 more source
Enhancement-mode tri-gate GaN MIS-HEMTs with PEALD-AlN/HfO2 dual-gate dielectric [PDF]
APL Electronic DevicesIn this study, we demonstrate a PEALD-AlN/HfO2 dual-gate dielectric normally-off GaN high-electron-mobility transistor (HEMT) with a recess-tri-gate architecture.
Rahul Rai +4 more
doaj +1 more source
The Scientific World Journal, Volume 2014, Issue 1, 2014., 2014 As semiconductor technology scales into the nanometer regime, intermittent faults have become an increasing threat. This paper focuses on the effects of intermittent faults on NET versus REG on one hand and the implications for dependability strategy on the other.
Chao(Saul) Wang +5 more
wiley +1 more source
Advanced Electronic Materials, Volume 11, Issue 12, August 6, 2025.This study reveals a novel failure mode in SiO₂/Si₃N₄ stacked capacitors, where dopant diffusion leads to interfacial oxide thinning, reducing dielectric breakdown voltage. Experimental results show that n type capacitors exhibit superior reliability, whereas p type capacitors fail rapidly.
Shuo Wang +7 more
wiley +1 more source
Algorithms, 2016 The reliability of Very Large Scale Integration (VLSI) circuits has become increasingly susceptible to transient faults induced by environmental noise with the scaling of technology.
Zhiming Yang +3 more
doaj +1 more source
The Improvement of Reliability of High‐k/Metal Gate pMOSFET Device with Various PMA Conditions
Active and Passive Electronic Components, Volume 2012, Issue 1, 2012., 2012 The oxygen and nitrogen were shown to diffuse through the TiN layer in the high‐k/metal gate devices during PMA. Both the oxygen and nitrogen annealing will reduce the gate leakage current without increasing oxide thickness. The threshold voltages of the devices changed with various PMA conditions.
Yi-Lin Yang +4 more
wiley +1 more source
Investigation and Improvement of the Bias Temperature Instability in Carbon Nanotube Transistors
Advanced Electronic Materials, Volume 11, Issue 4, April 2025.In this work, the reliability of BTI in top‐gate CNT FETs under a wide range of temperatures is investigated firstly. The CNT devices not only exhibit a high on/off current ratio (Ion/Ioff, ≈105) and a low subthreshold swing (SS) ranging from 200 to 400 K, but also the threshold voltage (Vth) shifts caused by BTI become 2–3 times smaller than previous ...
Yifu Sun +9 more
wiley +1 more source