Results 11 to 20 of about 456,709 (290)
A Scalable Software Defined Network Orchestrator for Photonic Network on Chips
IEEE Access, 2021 Photonic networks and software-defined networks are two promising technologies to improve network-on-chips performance, scalability, and resource utilization.
Doaa A. Hamdi +3 more
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Technologies, 2020 Core mapping, in which a core graph is mapped to a network graph to minimize communication, is a common design problem for Systems-on-Chip interconnected by a Network-on-Chip. In conventional multiprocessors, this mapping is area-agnostic as the cores in
Jan Moritz Joseph +4 more
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Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs
IEEE Access, 2020 Network-on-chip (NoC) is evolving as a better substitute for incorporating a large number of cores on a single system-on-chip (SoC). The dependency on multi-core systems to accomplish the high-performance constraints of composite embedded applications is
Waqar Amin +6 more
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Congestion-aware wireless network-on-chip for high-speed communication
Automatika, 2020 The design of system-on-chip (SoC) requires the complex integration between a multi-number of cores on a single chip. To establish the effective communication between multiple cores there aremore challenging issues on designing the network-on-chip (NoC ...
M. Devanathan +2 more
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Congestion aware low power on chip protocols with network on chip with cloud security
Journal of Cloud Computing: Advances, Systems and Applications, 2022 This article is to analyze the bottleneck problems of NoC in many more applications like multi-processor communication, computer architectures, and network interface processors.
Suresh Ponnan +4 more
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Energy Aware Parallel Scheduling Techniques for Network-on-Chip Based Systems
IEEE Access, 2021 Minimizing execution time, energy consumption, and network load through scheduling algorithms is challenging for multi-processor-on-chip (MPSoC) based network-on-chip (NoC) systems. MPSoC based systems are prevalent in high performance computing systems.
Bichi Bashir Yusuf +3 more
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RecoNoC: a reconfigurable network-on-chip [PDF]
, 2011 This article presents the design of RecoNoC: a compact, highly flexible FPGA-based network-on-chip (NoC), that can be easily adapted for various experiments. In this work, we enhanced this NoC with dynamically reconfigurable shortcuts.
Al Farisi, Brahim +4 more
core +2 more sources
Wireless network-on-chip: a survey
The Journal of Engineering, 2014 To alleviate the complex communication problems arising in the network-on-chip (NoC) architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip ...
Shuai Wang, Tao Jin
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A Novel 3D Mesh-Based NoC Architecture for Performance Improvement
Majlesi Journal of Electrical Engineering, 2022 Applying semiconductor technology, network-on-chips (NoCs) are designed on silicon chips to expand on-chip communications. Three-dimensional (3D) mesh-based architecture is also known as a basic NoC architecture characterized by better energy consumption
Navid Habibi +2 more
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Channel Characterization for Chip-scale Wireless Communications within Computing Packages [PDF]
, 2018 Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce latency and ...
Abadal, Sergi +4 more
core +2 more sources