Results 221 to 230 of about 10,864,876 (268)

Design and Implementation of a Non-volatile RAM Disk in the SAN Environment

2004
The mechanical nature of the magnetic disks limits the possibility of significant improvement of the I/O performance of the magnetic disk storage systems currently in use. The use of magnetic disk storage system has become an obstacle to the performance development of critical applications.
Jiwu Shu, Bing Yu, Rui Yan
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An endurance-free ferroelectric random access memory as a non-volatile RAM

2008 Symposium on VLSI Technology, 2008
We demonstrate endurance characteristics of a 1T1C, 64 Mb FRAM in a real-time operational situation. To explore endurance properties in address access time tAA of 100 ns, we establish a measurement set-up that covers asymmetric pulse-chains corresponding to D1- and D0-READ/RESTORE/WRITE over a frequency range from 1.0 to 7.7 MHz. What has been achieved
D. J. Jung, W. S. Ahn, Y. K. Hong, H. H. Kim, Y. M. Kang, J. Y. Kang, E. S. Lee, H. K. Ko, S. Y. Kim, W. W. Jung, J. H. Kim, S.K. Kang, J. Y. Jung, H. S. Kim, D. Y. Choi, S. Y. Lee, K. H. A. Wei, C. Wei, H. S. Jeong   +18 more
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A Non-Volatile Buffered Main Memory Using Phase-Change RAM

2012
The new trends of memory semi-conductor technology are changing and developing. Phase-Change RAM (PRAM), Ferroelectric RAM (FeRAM), Magnetic RAM (MRAM) and Resistive RAM (RRAM) are going to take center stage of main memory material of new computer systems in next decade. PRAM also has higher dense, it can keep data about four times more than DRAM.
Do-Heon Lee, Chung-Pyo Hong, Shin-Dug Kim   +2 more
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Non-volatile spin-transfer torque RAM (STT-RAM): Data, analysis and design requirements for thermal stability

2010 Symposium on VLSI Technology, 2010
The thermal stability of STT-RAM is measured by multiple techniques and compared with theory. The read disturb rate is found to be determined by the standby thermal stability, but the error rate at target read currents is higher than expected. The implication for the design of 1 Gb STT-RAM is that 10 year room temperature data retention as well as 1000
A. Driskill-Smith, S. Watts, V. Nikitin, D. Apalkov, D. Druist, R. Kawakami, X. Tang, X. Luo, A. Ong, E. Chen   +9 more
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A Microcomputer Chip With Non-Volatile Shadow Ram for Consumer Applications

IEEE Transactions on Consumer Electronics, 1986
Using a double cell approach combining static and non-volatile memory, a dedicated microcomputer chip includes a memory which operates at the full micro speed, yet can retain data even when the power supply has been removed. Applications of the device include electronicect- onic tuning systems, analog value settings, white goods, smart telephones ...
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A Hybrid Memory Hierarchy to Improve Cache Reliability with Non-volatile STT-RAM

2017
With the development of manufacturing technology, chips have more integration density. However, soft errors have become a sensitive concern in the design of computer systems. So, in this paper, it aims to find the potential vulnerable data and allocates it into a reliable Non-Volatile Memory (NVM) with the assistance of complier on a hybrid memory ...
Naikuo Chen, Zhilou Yu, Ruidong Zhao
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Non-volatile Spin-Transfer Torque RAM (STT-RAM): An analysis of chip data, thermal stability and scalability

2010 IEEE International Memory Workshop, 2010
STT-RAM (Spin-Transfer Torque Random Access Memory) is a fast (≪10 ns), scalable, durable, non-volatile memory technology that is easily embedded in standard CMOS processes. An STT-RAM memory cell consists of an access transistor and a magnetic tunnel junction (MTJ) storage element (Figure 1).
A. Driskill-Smith, S. Watts, D. Apalkov, D. Druist, X. Tang, Z. Diao, X. Luo, A. Ong, V. Nikitin, E. Chen   +9 more
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28nm advanced CMOS resistive RAM solution as embedded non-volatile memory

2014 IEEE International Reliability Physics Symposium, 2014
A back-end integrated Resistive Random Access Memory (ReRAM) (TiN/HfO 2 /Ti/TiN) in advanced 28nm CMOS process is evaluated. Significant operating margins and high performances identified at device level (read margin, low power set/reset, endurance and retention) are demonstrated to be significantly reduced on larger statistics, i.e.
Benoist, Antoine, Blonkowski, S., Jeannot, S., Denorme, S., Damiens, J., Berger, J., Candelier, P., Vianello, E., Grampeix, H., Nodin, J., Jalaguier, E., Perniola, L., Allard, Bruno   +12 more
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Using Non-Volatile RAM as a Write Buffer for NAND Flash Memory-based Storage Devices

2008 IEEE International Symposium on Modeling, Analysis and Simulation of Computers and Telecommunication Systems, 2008
Recent development of next generation non-volatile memory types such as MRAM, FeRAM and PRAM provide higher commercial value to Non-Volatile RAM (NVRAM). In this paper, we suggest the utilization of small-sized, next-generation NVRAM as a write buffer to improve the overall performance of NAND flash memory-based storage systems.
Sungmin Park, Hoyoung Jung, Hyoki Shim, Sooyong Kang, Jaehyuk Cha   +4 more
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High density 5 Volt-only compatible non-volatile RAM cell

1982 International Electron Devices Meeting, 1982
A high density, non-volatile RAM cell composed of a volatile RAM component, merged with a non-volatile element which "shadows" the RAM component, is described. Unlike earlier low density Shadow RAM approaches, small cell size is achieved here by utilizing a vertically integrated 1T-1C DRAM element merged with a highly compact, vertically integrated ...
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