Results 41 to 50 of about 24,540 (306)
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
We present a versatile three-dimensional finite element simulation framework that couples a charge and spin drift-diffusion formalism, extended to include interfacial spin-orbit coupling, with the Landau-Lifshitz-Gilbert equation.
Nils Petter Jørstad +3 more
doaj +1 more source
Editorial for the Special Issue on Magnetic and Spin Devices
As scaling of semiconductor devices displays signs of saturation, the focus of research in microelectronics shifts towards finding new computing paradigms based on novel physical principles [...]
Viktor Sverdlov, Nuttachai Jutong
doaj +1 more source
Boosting Ferroelectricity: 2D and Polymer Ferroelectric Hybrids Enabling Ambipolar Nonvolatile MoS<sub>2</sub> Memory Transistor. [PDF]
Two‐dimensional CuInP2S6 nanosheets are incorporated into a P(VDF‐TrFE) matrix to induce polarization‐cooperative ferroelectric coupling. The resulting P(VDF‐TrFE)/CuInP2S6 hybrid film exhibits reinforced ferroelectric ordering and reduced coercive electric fields compared with pristine P(VDF‐TrFE).
Jeong Y +10 more
europepmc +2 more sources
Imprint Control of Nonvolatile Shape Memory with Asymmetric Ferroelectric Multilayers
Imprint Control of Nonvolatile Shape Memory with Asymmetric Ferroelectric ...
Young-Han Shin (1700146) +3 more
core +1 more source
Memristive‐Gated RC‐Delay Synaptic Transistors for Time‐Encoded Analog in‐Memory Computing
A Memristive‐Gated Transistor for Time‐Encoded Analog In‐Memory Computing — By exploiting the RC delay of a self‐rectifying interface‐type memristor, nonlinear I–V distortion is structurally bypassed, enabling 3‐bit nonvolatile memory, spike‐timing‐based analog encoding, and hardware‐calibrated reservoir‐computing validation within a unified device ...
Yun‐Seo Shin +7 more
wiley +1 more source
Ten States of Nonvolatile Memory through Engineering Ferromagnetic Remanent Magnetization
Ten States of Nonvolatile Memory through Engineering Ferromagnetic Remanent ...
Zhao, Yuelei +12 more
core +1 more source
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan +4 more
wiley +1 more source
Anti‐ferroelectrics (AFEs) offer unique properties such as double hysteresis window, high endurance, and low latency, making them appealing for neuromorphic computing architectures.
Mohammad Khaleqi Qaleh Jooq +4 more
doaj +1 more source
Nonvolatile storage in photorefractive crystals [PDF]
We propose and demonstrate a nonvolatile holographic recording system for storing two-dimensional images. The readout light in this system is not absorbed by the holographic medium, and the data are preformatted or postformatted so that lines from different holograms are interleaved to satisfy the Bragg-matching condition.
MOK, F., LI, H.Y.S., PSALTIS, D.
openaire +3 more sources

