Results 31 to 40 of about 280,489 (305)
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
High Performance MRAM with Spin-Transfer-Torque and Voltage-Controlled Magnetic Anisotropy Effects
The Internet of Things (IoTs) relies on efficient node memories to process data among sensors, cloud and RF front-end. Both mainstream and emerging memories have been developed to achieve this energy efficiency target.
Hao Cai +5 more
doaj +1 more source
Pulse percolation conduction and multi-valued memory
We develop a theory of pulse conduction in percolation type materials such as noncrystalline semiconductors and nano-metal compounds. For short voltage pulses, the corresponding electric currents are inversely proportional to the pulse length and exhibit
V. G. Karpov +3 more
doaj +1 more source
ELECTRICAL CHARACTERIZATION, PHYSICS, MODELING AND RELIABILITY OF INNOVATIVE NON-VOLATILE MEMORIES [PDF]
Enclosed in this thesis work it can be found the results of a three years long research activity performed during the XXIV-th cycle of the Ph.D. school in Engineering Science of the Università degli Studi di Ferrara. The topic of this work is concerned
Zambelli, Cristian
core
Nonvolatile Memories: Present and Future Challenges
Due to the rapid development of hand-held electronic devices, the need for high density, low power, high performance SoCs has pushed the well-established embedded memory technologies to their limits.
C. Zambelli +7 more
core +1 more source
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories [PDF]
In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage ...
C. Zambelli +19 more
core +1 more source
Omnipolar Magnetic Field Detection by Superlattice‐Based Hall Sensor
Magnetic‐field‐induced electronic switching is demonstrated in unit‐cell‐engineered La0.7Sr0.3MnO3–BiFeO3 superlattices. Distinct substrate terminations modify magnetic and transport properties. Hall resistance measurements show omnipolar, hysteretic anomalous Hall switching above the Curie temperature, arising from Fe─Mn interfacial exchange, enabling
Mark Huijben +6 more
wiley +1 more source
In this work, high-k composite TiAlO film has been investigated as charge-trapping material for nonvolatile memory applications. The annealing formed Al2O3-TiAlO-SiO2 dielectric stack demonstrates significant memory effects and excellent reliability ...
Wenchao Xu +11 more
doaj +1 more source
Volatile-Nonvolatile Memory Network for Progressive Image Super-Resolution
Single-image super-resolution, i.e., reconstructing a high-resolution image from a low-resolution image, is a critical concern in many computer vision applications. Recent deep learning-based image super-resolution methods employ massive numbers of model
Jun-Ho Choi +3 more
doaj +1 more source
Sodium alginate regulates interfacial ion transport and retention in electrolyte‐gated synaptic transistors. The carboxylate‐rich polymeric network forms a dynamic interfacial ion‐diffusion barrier that facilitates ion injection during programming while suppressing ion back‐diffusion, thereby stabilizing the electrochemically doped channel state.
Chaeyeon Han +6 more
wiley +1 more source

