Results 61 to 70 of about 1,757,496 (307)

Size and Location Control of Si Nanocrystals at Ion Beam Synthesis in Thin SiO2 Films

, 2002
Binary collision simulations of high-fluence 1 keV Si ion implantation into 8 nm thick SiO2 films on (001)Si were combined with kinetic Monte Carlo simulations of Si nanocrystal (NC) formation by phase separation during annealing.
Heinig, Karl-Heinz, Moeller, Wolfhard, Mueller, Torsten   +2 more
core   +1 more source

Stress-Induced Leakage Current in p+ Poly MOS Capacitors with Poly-Si and Poly-Si0.7Ge0.3 Gate Material [PDF]

, 1999
The gate bias polarity dependence of stress-induced leakage current (SILC) of PMOS capacitors with a p+ polycrystalline silicon (poly-Si) and polycrystalline Silicon-Germanium (poly-Si0.7 Ge0.3) gate on 5.6-nm thick gate oxides has been investigated.
Holleman, J., Houtsma, V.E., Salm, Cora, Widdershoven, F.P., Widdershoven, F.P., Woerlee, P.H.   +5 more
core   +3 more sources

Intermediate Resistive State in Wafer‐Scale Vertical MoS2 Memristors Through Lateral Silver Filament Growth for Artificial Synapse Applications

Advanced Functional Materials, EarlyView.
In MOCVD MoS2 memristors, a current compliance‐regulated Ag filament mechanism is revealed. The filament ruptures spontaneously during volatile switching, while subsequent growth proceeds vertically through the MoS2 layers and then laterally along the van der Waals gaps during nonvolatile switching.
Yuan Fa, Milan Buttberg, Ke Ran, Rana Walied Ahmad, Dennis Braun, Lukas Völkel, Jimin Lee, Sofía Cruces, Bart Macco, Bárbara Canto, Holger Lerch, Thorsten Wahlbrink, Holger Kalisch, Michael Heuken, Andrei Vescan, Joachim Mayer, Zhenxing Wang, Ilia Valov, Stephan Menzel, Max C. Lemme   +19 more
wiley   +1 more source

Advanced Modeling and Simulation of Multilayer Spin–Transfer Torque Magnetoresistive Random Access Memory with Interface Exchange Coupling

Micromachines
In advancing the study of magnetization dynamics in STT-MRAM devices, we employ the spin drift–diffusion model to address the back-hopping effect. This issue manifests as unwanted switching either in the composite free layer or in the reference layer in ...
Mario Bendra, Roberto Lacerda de Orio, Siegfried Selberherr, Wolfgang Goes, Viktor Sverdlov   +4 more
doaj   +1 more source

Memristor-Based Nonvolatile Random Access Memory: Hybrid Architecture for Low Power Compact Memory Design

IEEE Access, 2013
In this paper, a new approach toward the design of a memristor based nonvolatile static random-access memory (SRAM) cell using a combination of memristor and metal-oxide semiconductor devices is proposed. Memristor and MOSFETs of the Taiwan Semiconductor
Syed Shakib Sarwar, Syed An Nazmus Saqueb, Farhan Quaiyum, A. B. M. Harun-Ur Rashid   +3 more
doaj   +1 more source

Forming-free bipolar and unipolar resistive switching behaviors with low operating voltage in Ag/Ti/CeO2/Pt devices

Results in Physics, 2020
Resistive switching devices are promising candidates to replace today’s nonvolatile memory device, and find applications in neuromorphic computing. In this study, bipolar resistive switching (BRS) and unipolar resistive switching (URS) behaviors at room ...
Wenqing Wang, Baolin Zhang, Hongbin Zhao
doaj   +1 more source

A multilevel nonvolatile magnetoelectric memory

Scientific Reports, 2016
AbstractThe coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade.
Jianxin Shen, Junzhuang Cong, Dashan Shang, Yisheng Chai, Shipeng Shen, Kun Zhai, Young Sun   +6 more
openaire   +2 more sources

Temperature‐Induced Nonvolatile Switching through Thermal Hysteresis in a Gd3Fe5O12/Ho3Fe5O12 Exchange‐Coupled Rare‐Earth Iron Garnet Bilayer

Advanced Functional Materials, EarlyView.
Reducing power consumption in spintronic memory remains a major challenge due to the need for high current densities. A bilayer of gadolinium and holmium iron garnets enables purely temperature‐induced, nonvolatile magnetic switching with bistable states within a ±25 K range. This approach achieves up to 66‐fold lower energy use than current spin–orbit
Junseok Kim, Phuoc Cao Van, Jong‐Ryul Jeong, Hyungyu Jin   +3 more
wiley   +1 more source

Nonvolatile Analog Memory [PDF]

, 2007
A nonvolatile analog memory uses pairs of ferroelectric field effect transistors (FFETs). Each pair is defined by a first FFET and a second FFET. When an analog value is to be stored in one of the pairs, the first FFET has a saturation voltage applied ...
MacLeod, Todd C.
core   +1 more source

Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips

Advanced Functional Materials, EarlyView.
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee, Sofía Cruces, Xiaohua Liu, Yang Chen, Vasilis A. Maroufidis, Janghyun Jo, Lukas Völkel, Dennis Braun, Michael Möller, Leon Brackmann, Holger Kalisch, Michael Heuken, Andrei Vescan, Rafal E. Dunin‐Borkowski, Joachim Mayer, Stefan Wiefels, Max C. Lemme   +16 more
wiley   +1 more source