Results 61 to 70 of about 102 (93)

A Reliability Investigation of VDMOS Transistors: Performance and Degradation Caused by Bias Temperature Stress. [PDF]

Micromachines (Basel)
Živanović E, Veljković S, Mitrović N, Jovanović I, Djorić-Veljković S, Paskaleva A, Spassov D, Danković D.   +7 more
europepmc   +1 more source

Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging? [PDF]

Materials (Basel), 2012
Ando T.
europepmc   +1 more source

Multi- and All-Acceptor Polymers for High-Performance n-Type Polymer Field Effect Transistors. [PDF]

Polymers (Basel)
Bharathi G, Hong S.
europepmc   +1 more source

Oriented ion migration in dielectric Sb₄O₅Cl₂ single crystals for multifunctional two-dimensional electronics. [PDF]

Nat Commun
Li Z, Gou G, Xu X, Wang H, Liu T, Luo H, Wu J, Liu K, Gao L, Zhai T, Zhou X.   +10 more
europepmc   +1 more source

Magnetron-Sputtered Lead Titanate Thin Films for Pyroelectric Applications: Part 2-Electrical Characteristics and Characterization Methods. [PDF]

Materials (Basel)
Fathipour M, Xu Y, Rana M.
europepmc   +1 more source

Development on inverted perovskite solar cells: A review. [PDF]

Heliyon
Nyiekaa EA, Aika TA, Orukpe PE, Akhabue CE, Danladi E.   +4 more
europepmc   +1 more source

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Novel Positive Bias Temperature Instability (PBTI) of N-Channel Mosfets with Plasma Nitrided Oxide

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual, 2007
This work reports for the first time a new positive bias temperature instability (PBTI) degradation mode in n-channel MOSFETs related to the introduction of plasma nitridation process step. The degradation is explained only by interface traps creation, differently to NBTI on p-channel MOSFETs where hole trapping might be ...
V. Huard, C. Guerin, C. Parthasarathy
openaire   +3 more sources

Simulation of Positive Bias Temperature Instability (PBTI) in high-k FinFET by KMC method

2015 International Symposium on VLSI Technology, Systems and Applications, 2015
Positive Bias Temperature Instability (PBTI) of HfO 2 /metal gate n-channel bulk FinFET is simulated through a KMC method, which includes fully coupled multi-physical models under a unified framework. PBTI is simulated using electron capture/emission and trap generation/recombination.
Yun Li, Yijiao Wang, Hai Jiang, Gang Du, Jinfeng Kang, Xiaoyan Liu   +5 more
openaire   +3 more sources

Dependence of short channel length on negative/positive bias temperature instability (NBTI/PBTI) for 3D FinFET devices

Chinese Physics B, 2022
A comprehensive study of the negative and positive bias temperature instability (NBTI/PBTI) of 3D FinFET devices with different small channel lengths is presented. It is found while with the channel lengths shrinking from 100 nm to 30 nm, both the NBTI characteristics of p-FinFET and PBTI characteristics of n-FinFET turn better.
Ren-Ren Xu, Qing-Zhu Zhang, Long-Da Zhou, Hong Yang, Tian-Yang Gai, Hua-Xiang Yin, Wen-Wu Wang   +6 more
openaire   +1 more source

Impact of positive bias temperature instability (PBTI)

Integration, 2011
Memory circuits are playing a key role in complex multicore systems with both data and instructions storage and mailbox communication functions. There is a general concern that conventional SRAM cell based on the 6T structure could exhibit serious limitations in future CMOS technologies due to the instability caused by transistor mismatching as well as
Aymerich Capdevila, Nivard, Ganapathy, Shrikanth, Rubio Sola, Jose Antonio, Canal Corretger, Ramon, González Colás, Antonio María   +4 more
openaire   +4 more sources