Results 51 to 60 of about 2,610 (194)

Resistive communications based on neuristors

open access: yes, 2017
Memristors are passive elements that allow us to store information using a single element per bit. However, this is not the only utility of the memristor.
Pizzo, David Alejandro Trejo
core   +1 more source

ReRAM/CMOS Array Integration and Characterization via Design of Experiments

open access: yesAdvanced Electronic Materials, EarlyView.
This paper proposes the Design of Experiments to characterize arrays of oxide‐based ReRAM devices by exploring the large characterization space efficiently using only a few numbers of experiments. Using in‐house integration of 20 000 ReRAM devices on a CMOS chip, the unconventional optimization approach determines optimized measurement parameters and ...
Imtiaz Hossen   +7 more
wiley   +1 more source

Studies of resistance switching effects in metal/YBa2Cu3O7-x interface junctions

open access: yes, 2010
Current-voltage characteristics of planar junctions formed by an epitaxial c-axis oriented YBa2Cu3O7-x thin film micro-bridge and Ag counter-electrode were measured in the temperature range from 4.2 K to 300 K.
A. Plecenik   +30 more
core   +1 more source

Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges [PDF]

open access: yes, 2016
Resistive switching memories [resistive RAM (RRAM)] are an attractive alternative to nonvolatile storage and nonconventional computing systems, but their behavior strongly depends on the cell features, driver circuit, and working conditions.
Aparicio Cerqueira, Hernán   +5 more
core   +2 more sources

Characterization and Modeling of Multilevel Analog ReRAM Synapses in the Sky130 Process

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Nonvolatile memory devices play a key role in enabling energy-efficient computing. Among them, analog nonvolatile memories such as resistive random access memory (ReRAM) offer high density and low power compared to conventional digital memories. However,
Irem Didin   +3 more
doaj   +1 more source

Study of Resistive Switching Dynamics and Memory States Equilibria in Analog Filamentary Conductive‐Metal‐Oxide/HfOx ReRAM via Compact Modeling

open access: yesAdvanced Electronic Materials, EarlyView.
A physics‐based compact model for Conductive‐Metal‐Oxide/HfOx ReRAM, accounting for ion dynamics, electronic conduction, and thermal effects, is presented. Accurate and versatile simulations of analog non‐volatile conductance modulation and memory state stabilization enable reliable circuit‐level studies, advancing the optimization of neuromorphic and ...
Matteo Galetta   +9 more
wiley   +1 more source

Stabilization of multiple resistance levels by current-sweep in SiOx-based resistive switching memory [PDF]

open access: yes, 2015
Using current-sweep measurements, the set process in SiOx-based resistive random access memory (RRAM) has been found to consist of multiple resistance-reduction steps.
Byun, Kwangsub   +4 more
core   +1 more source

A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2019
This paper presents a ferroelectric FET (FeFET)-based processing-in-memory (PIM) architecture to accelerate the inference of deep neural networks (DNNs).
Yun Long   +7 more
doaj   +1 more source

RRAM Variability Harvesting for CIM‐Integrated TRNG

open access: yesAdvanced Electronic Materials, EarlyView.
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende   +4 more
wiley   +1 more source

RRAM Reliability/Performance Characterization through Array Architectures Investigations [PDF]

open access: yes, 2015
The reliability and performance characterization of each non-volatile memory technology requires the thorough investigation of dedicated array test structures that mimic the real operations of a fully functional integrated product.
Grossi, Alessandro   +4 more
core   +1 more source

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