Results 61 to 70 of about 15,800,744 (205)

A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2019
This paper presents a ferroelectric FET (FeFET)-based processing-in-memory (PIM) architecture to accelerate the inference of deep neural networks (DNNs).
Yun Long, Daehyun Kim, Edward Lee, Priyabrata Saha, Burhan Ahmad Mudassar, Xueyuan She, Asif Islam Khan, Saibal Mukhopadhyay   +7 more
doaj   +1 more source

Negative Feedback in Hf0.5Zr0.5O2 Resistive Memory: Feigenbaum Route Toward Two‐Terminal Pseudo‐Random Number Generation and Neural Network Instabilities

Advanced Electronic Materials, EarlyView.
Resistively switching TiN/Hf0.5Zr0.5/Au valance‐change memory devices show period‐doubling bifurcations, arising from competing influences of filamentary counter‐eightwise filamentary switching and eigthwise electrochemical oxygen exchange at the active electrode.
Sebastian Obernberger, Yoandris Gonzalez, Andranik Sarkissian, Christina Schindler, Andreas Ruediger   +4 more
wiley   +1 more source

Operation Voltage Control in Complementary Resistive Switches Using Heterodevice

, 2018
For the high-density memory application of resistive random access memory (ReRAM), we study the complementary resistive switch (CRS) behavior of a HfOx-based ReRAM with a TiOx-based ReRAM.
Choi, G, Lee, J, Hwang, H, Kim, S, Siddik, M, Jung, S, Woo, J, Park, J, Daeseok Lee, Cha, E   +9 more
core   +1 more source

Compact Modeling of Volatile‐Switching Electrochemical Metallization Memory Cells by Means of the Electromotive Force

Advanced Intelligent Systems, EarlyView.
A volatile‐switching compact model of electrochemical metallization memory cells for neuromorphic architecture is developed and validated by reliable reproduction of device characterization measurements: I−V sweeps, SET kinetics, relaxation dynamics.
Rana Walied Ahmad, Solomon Amsalu Chekol, Julius Rasbach, Susanne Hoffmann‐Eifert, Stephan Menzel   +4 more
wiley   +1 more source

Parallel computing of graph-based functions in ReRAM

, 2022
Resistive Random Access Memory (ReRAM) is an emerging non-volatile memory technology. Besides its low power consumption and its high scalability, its inherent computation capabilities make ReRAM especially interesting for future computer architectures ...
Shirinzadeh, Saeideh, Froehlich, Saman, Drechsler, Rolf   +2 more
core   +1 more source

Nanoparticles-array-air spacer passivated memristor with high on/off ratio and low reset current density

Nano Research
Non-volatile resistive random-access memory (ReRAM) is a promising candidate for next-generation information storage, such as radiation-resistant memory modules and multifunctional memristor for sensing, data storage, and computing.
Dong Li, Yawen Wang, Wanyu Lu, Xinpeng Wang, Chang Liu, Haseeb Ur Rehman, Bo Zhao, Weijing Shao, Yu Wang, Oleksandr Ivasenko, Yinghui Sun, Yandong Wang, Lin Jiang   +12 more
doaj   +1 more source

Resistive Random-Access Memory (ReRAM) Circuit Design Optimization

Academic Journal of Science and Technology
With the fast development and broad application of artificial intelligence, mobile terminals, and autonomous driving, the advanced System-on-Chip (SoC) design faces unprecedented memory demand, especially under the two core requirements for High-Density Integration and Low-Power Operation. Under such circumstances, Resistive Random-Access Memory (RRAM)
openaire   +1 more source

Origin, verification, and device‐level impacts of p‐doping in two‐dimensional transition metal dichalcogenides

InfoMat, EarlyView.
This review provides a comprehensive perspective on p‐doping in two‐dimensional transition metal dichalcogenides, linking the origins of carrier polarity, doping mechanisms, verification methodologies, and device‐level impacts. By establishing correlations among atomic‐scale doping, carrier modulation, and device functionality, it offers practical ...
Seo Yeon Han, Hye In Choi, Ji Yeon Kim, Wenhu Shen, Yong Soo Cho   +4 more
wiley   +1 more source

GeSeTe-based OTS selector integrated with ReRAM for high-density 1S-1R memory arrays

AIP Advances
In this study, we developed a high-performance binary Ovonic Threshold Switching (OTS) selector based on GeSeTe and a resistive random access memory (ReRAM) device based on TaOx.
Hyun Kyu Seo, June Hyuk Lee, Min Kyu Yang   +2 more
doaj   +1 more source

Material and Electrical study of HfO2-Based Resistive Random Access Memories (ReRAMs)

, 2019
Resistive Random Access Memories (ReRAMs) have been researched intensively in the last past decades as a promising alternatives technology for the next-generation non-volatile memory (NVM) devices. ReRAMâ s excellent performance properties such as high switching speed, excellent scalability, and low power consumption together with accessible ...
openaire   +1 more source