Results 1 to 10 of about 2,116 (217)

Performance Optimization of the InGaP/GaAs Dual-Junction Solar Cell Using SILVACO TCAD

open access: yesInternational Journal of Photoenergy, 2021
In this work, an optimization of the InGaP/GaAs dual-junction (DJ) solar cell performance is presented. Firstly, a design for the DJ solar cell based on the GaAs tunnel diode is provided.
Marwa S. Salem   +7 more
doaj   +2 more sources

A Symmetric U-Shaped Gate Tunnel FET-ISFET Hybrid Label-Free Biosensor for Highly Sensitive DNA Detection [PDF]

open access: yesSensors
Ion-Sensitive Field-Effect Transistors (ISFETs) have been extensively used to detect various biomolecules, as the intrinsic charge of these molecules can change the transistor’s current or threshold voltage.
Yourui An   +6 more
doaj   +2 more sources

Double-gate MOSFET Model Implemented in Verilog-AMS Language for the Transient Simulation and the Configuration of Ultra Low-power Analog Circuits [PDF]

open access: yesInternational Journal of Electronics and Telecommunications, 2021
This paper deals with the implementation of a DC and AC double-gate MOSFET compact model in the Verilog- AMS language for the transient simulation and the configuration of ultra low-power analog circuits. The Verilog-AMS description of the proposed model
Billel Smaani   +5 more
doaj   +1 more source

1.3 kV Vertical GaN-Based Trench MOSFETs on 4-Inch Free Standing GaN Wafer

open access: yesNanoscale Research Letters, 2022
In this work, a vertical gallium nitride (GaN)-based trench MOSFET on 4-inch free-standing GaN substrate is presented with threshold voltage of 3.15 V, specific on-resistance of 1.93 mΩ·cm2, breakdown voltage of 1306 V, and figure of merit of 0.88 GW/cm2.
Wei He   +12 more
doaj   +1 more source

The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy

open access: yesIEEE Access, 2020
We present numerical methods to enable accurate and robust level-set based simulation of anisotropic wet etching and non-planar epitaxy for semiconductor fabrication.
Alexander Toifl   +6 more
doaj   +1 more source

Prediction and Simulation of electrical and optical characteristics of an OLED based on P3BEdotBT3A organic material [PDF]

open access: yesE3S Web of Conferences, 2022
The OLED “organic light-emitting diode” has been highly industrialized for several years, especially since their use in smartphones and televisions. OLEDs have attracted a lot of attention because of their desirable characteristics including their low ...
El karkri Anass   +2 more
doaj   +1 more source

Tunneling FET Calibration Issues: Sentaurus vs. Silvaco TCAD

open access: yesJournal of Physics: Conference Series, 2020
Abstract In this paper, a comprehensive comparison of TFET simulations using two TCAD simulators, Sentaurus and Silvaco TCAD, is presented. The comparison is fully cover various types of TFETs, either from the structure geometry or the materials point of view, which proved a framework for TFET designs and simulations. For Sentaurus TCAD,
Amira Nabil   +4 more
openaire   +1 more source

High Power Normally-OFF GaN/AlGaN HEMT with Regrown p Type GaN

open access: yesEnergies, 2021
In this paper is presented a Normally-OFF GaN HEMT (High Electron Mobility Transistor) device using p-doped GaN barrier layer regrown by CBE (Chemical Beam Epitaxy).
Gwen Rolland   +11 more
doaj   +1 more source

A Carbon Nanotube (CNT)-based SiGe Thin Film Solar Cell Structure [PDF]

open access: yesJournal of Optoelectronical Nanostructures, 2021
در این مقاله ، ساختاری از سلول خورشیدی فیلم نازک SiGe بر اساس نانولوله کربنی (CNT) ارائه شده است. ما طراحی و شبیه سازی دستگاه را با استفاده از Silvaco TCAD ارائه می دهیم.
Homa hashemi madani   +2 more
doaj   +1 more source

Design impact on three gate Dynamic Flash Memory (3G_DFM) for long hole retention time and robust disturbance shield

open access: yesMemories - Materials, Devices, Circuits and Systems, 2023
TCAD simulation using Silvaco software has shown that the 3G_DFM, which has SG1 (Select Gate 1), PL (Plate Line Gate), and SG2 (Select Gate 2) between SL (Source Line) and BL (Bit Line), has a long retention time of 100ms at 85 °C, and a robust ...
Koji Sakui   +6 more
doaj   +1 more source

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