Results 31 to 40 of about 10,669 (173)

Designs and electric properties studied of 3D trench electrode Si detector with adjustable central collection electrode

open access: yesAIP Advances, 2018
In order to improve the radiation resistance of semiconductor detector, 3D trench electrode Si detector structures have been proposed by the Brookhaven National Laboratory (BNL) in 2009.
Chuan Liao   +4 more
doaj   +1 more source

Interface Engineering Toward High‐Efficiency CIAS Thin‐Film Solar Cells Using a Cadmium‐Free CuAlSe2 Buffer Layer: A SCAPS‐1D Investigation

open access: yesphysica status solidi (a), Volume 223, Issue 19, 6 October 2026.
Cadmium‐free CuAlSe2 emerges as a promising buffer layer for Cu(In,Al)Se2 (CIAS) thin‐film solar cells. An optimal buffer thickness of 0.01 µm and a conduction band offset of −0.25 eV, combined with a NiO hole transport layer, increase the simulated efficiency from 16.9% to 26.39%.
Pierre Gérard Darel Kond Ngue
wiley   +1 more source

A core drain current model for β-Ga2O3 power MOSFETs based on surface potential

open access: yesAIP Advances, 2023
For the first time, a core drain current model based on surface potential without any implicit functions is developed for beta-phase gallium oxide (β-Ga2O3) power metal-oxide-semiconductor field-effect transistors (MOSFETs).
Kai Zhou   +5 more
doaj   +1 more source

Optimization AlGaN/GaN HEMT with Field Plate Structures

open access: yesMicromachines, 2022
AlGaN/GaN HEMTs with several different designs of field plate structure are studied for device optimization purposes. To increase device breakdown voltage, optimal dimensions of field plates were first investigated using Silvaco TCAD software, and the ...
Ningping Shi   +4 more
doaj   +1 more source

MoS2/Graphene Floating‐Gate Transistor Toward Non‐Volatile Memory and High‐Precision Synaptic Operations

open access: yesAdvanced Electronic Materials, Volume 12, Issue 17, 7 September 2026.
The synaptic behavior of MoS2/graphene floating‐gate structures is shown. A subthreshold slope of 25 mV/decade, a high current ON/OFF ratio of 1010$^{10}$ with sub‐nanowatt power consumption are achieved. The programming–erasing time is approximately 11 ns, a memory window of 5.9 V, and a projected 10‐year retention of 91%.
Md. Ibrahim Ahmed, Sharnali Islam
wiley   +1 more source

Study on the effect of short gate length on 65nm NMOS transistor using SILVACO TCAD / Azira Ahmad Tarmizi [PDF]

open access: yes, 2020
The aim of this work is to design and study on the effect of short gate length of 65nm NMOS transistor using SILVACO TCAD. A 65nm NMOS was designed and fabricated to study its electrical characteristics.
Ahmad Tarmizi, Azira
core  

Bias‐Tunable Two‐Terminal Organic Photodetector for Intelligent Imaging

open access: yesAdvanced Science, Volume 13, Issue 48, 28 August 2026.
A vertically stacked two‐terminal photodetector with a symmetric donor–acceptor–donor trilayer active exhibits reconfigurable photoresponse with bias‐tunable magnitude and polarity, together with sub‐millisecond response speed and a wide tunable output window.
Sangin Hahn   +2 more
wiley   +1 more source

Comparison of electrical performances of two n-in-p detectors with different implant type of guard ring by TCAD simulation

open access: yesResults in Physics, 2016
This paper presents a preliminary comparative study for two different guard rings structures in the purpose of evaluating their electrical performances. The two structures are based on the n-in-p technology with different implant type of guard rings. I–V
Mohammed Mekheldi   +3 more
doaj   +1 more source

Tandem Neural Network Rapidly Solves Multivalued Inverse Problems: Application to Oxide‐Semiconductor Characterization

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 8, August 2026.
A tandem neural network directly solves the multivalued inverse problem of extracting semiconductor parameters from transistor measurements. Trained on only 1000 simulations, the network infers six material parameters (e.g., defect states, carrier concentration, mobility) in under 1 ms, demonstrating a broadly applicable framework for semiconductor ...
Masatoshi Kimura   +8 more
wiley   +1 more source

Schottky Barrier Engineering in n‐Type Organic Source‐Gated Transistors Enabling High Conductance

open access: yesAdvanced Materials Technologies, Volume 11, Issue 11, 5 June 2026.
This study introduces a modified source electrode architecture for n‐type organic source‐gated transistors (OSGTs). By integrating Schottky and Ohmic contact regions, the design achieves a thinner depletion envelope, enhancing mobility nearly tenfold and reducing threshold voltage.
Yonghee Kim   +4 more
wiley   +1 more source

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