Results 201 to 210 of about 13,092 (260)

Suggested Single Event Upset Figure of Merit

IEEE Transactions on Nuclear Science, 1983
This paper examines a number of concepts that are connected, directly or indirectly, with the problem of assigning a single event upset figure of merit to a specific oevice. Single event rates depend both on device and circuitry, through the critical charge requisite for upset, and upon the device geometry and technology, which determine the target ...
E. L. Petersen   +2 more
openaire   +3 more sources

Single event upset in avionics

IEEE Transactions on Nuclear Science, 1993
Data from military/experimental flights and laboratory testing indicate that typical non-radiation-hardened 64 K and 256 K static random access memories (SRAMs) can experience a significant soft upset rate at aircraft altitudes due to energetic neutrons created by cosmic ray interactions in the atmosphere.
A. Taber, E. Normand
openaire   +1 more source

Single event upset at gigahertz frequencies

IEEE Transactions on Nuclear Science, 1994
Single Event Upset (SEU) characteristics of a digital emitter coupled logic (ECL) device clocking at 0.5, 1, and 3.2 GHz and at temperatures of 5, 75, and 105/spl deg/ C are presented. The test technique is explained. Observations of two types of upsets, phase upsets at low Linear Energy Transfer (LETs) and amplitude upsets at high LETs are also ...
M. Shoga   +5 more
openaire   +1 more source

Mechanisms Leading to Single Event Upset

IEEE Transactions on Nuclear Science, 1986
SRAM cell recovery time following a 140 MeV Krypton strike on a Sandia SRAM is modelled using a two-dimensional transient numerical simulator and circuit code. Strikes at both n- and p-channel "off" drains are investigated. Four principle results are obtained.
C. L. Axness   +4 more
openaire   +1 more source

Single event upset rates in space

IEEE Transactions on Nuclear Science, 1992
SEUs (single event upsets) in the CRRES (Combined Release and Radiation Effects Satellite) MEP (Microelectronic Package Space Experiment) showed a dramatic increase during a solar flare, the influence of the flare varied widely among device types, and a GaAs RAM (random access memory) showed a different response to the proton belts than some 51 RAMs ...
A. Campbell, P. McDonald, K. Ray
openaire   +1 more source

Single event upset mitigation for FDP2008

2011 9th IEEE International Conference on ASIC, 2011
Highly integrated contemporary SRAM-based Field Programmable Gate Arrays (FPGAs) lead to high occurrence-rate of transient faults induced by Single Event Upsets (SEUs) in FPGAs' configuration memory. In this paper, Fudan Design Environment (FDE) Triple Module Redundancy (TMR) approach for design triplication has been devised to meet high-reliability ...
null Meng Yang, null Gengsheng Chen
openaire   +1 more source

Single Event Upsets in NMOS Microprocessors

IEEE Transactions on Nuclear Science, 1981
Three advanced 16-bit NMOS microprocessors have been observed to suffer single event upset at a rate varying between one upset for every 8 × 1010 to one for every 2 × 1012 n/cm2-upset for cyclotron-produced neutrons with an average energy of 14 MeV. These rates are expected to vary, probably upward, with different types of programs.
C. S. Guenzer   +2 more
openaire   +1 more source

Single Event Upset Testing

1988
Abstract : This report presents the results of an experimental program to characterize single event upset phenomena in selected bipolar memory devices irradiated with relativistic heavy ions. The principle objective was to determine the multibit upset rate at normal and parallel beam incidence angles.
Paul R. Measel   +3 more
openaire   +1 more source

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