Results 151 to 160 of about 10,455 (213)

Single-Event-Upset (SEU) Awareness in FPGA Routing

2007 44th ACM/IEEE Design Automation Conference, 2007
The majority of configuration bits affecting a design are devoted to FPGA routing configuration. We present a SEU-aware routing algorithm that provides significant reduction in bridging faults caused by SEUs. Depending on the routing architecture switches, for MCNC benchmarks, the number of care bits can be reduced between 13% and 19% on average with ...
S. Golshan, E. Bozorgzadeh
openaire   +1 more source

The Single Event Upset (SEU) Response to 590 MeV Protons

IEEE Transactions on Nuclear Science, 1984
A recent test of ten device types exposed to 590 MeV protons at SINR (Swiss Institute of Nuclear Research, Villigen) is presented to clarify the picture of SEU response to higher energy protons, such as those found in galactic cosmic rays, solar flares and trapped radiation belts.
D. K. Nichols, W. E. Price, L. S. Smith, G. A. Soli   +3 more
openaire   +1 more source

An Adaptive Single Event Upset (SEU)-Hardened Flip-Flop Design

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019
In this paper, a new radiation hardened flip-flop design technique is proposed. The structure provides an possibility that the D-type flip-flop can be configured as an Single Event Upset (SEU) hardened or non-hardened flip-flop in a circuit based on the logic states of the sensitive nodes with RC filtering structure being involved or not, considering ...
Man Zhang, ZhongJie Guo, WanCheng Xu
openaire   +1 more source

Investigation of single-event upset (SEU) in an advanced bipolar process

IEEE Transactions on Nuclear Science, 1988
An extensive analytical and experimental study of SEU in an advanced silicon bipolar process was made. The modeling used process and device parameters to model the SEU charge, collection, and circuit response derived from a special version of PISCES in cylindrical coordinates and SPICE, respectively. Data are reported for test cells of various sizes. >
J.A. Zoutendyk, E.C. Secrest, D.F. Berndt   +2 more
openaire   +1 more source

Error detection and correction of single event upset (SEU) tolerant latch

2012 IEEE 18th International On-Line Testing Symposium (IOLTS), 2012
Soft errors are a serious concern in state holder circuits at they can cause temporarily malfunctions. C-elements are one of the state holders that are widely used in asynchronous circuits. In this paper, our investigations focus on the vulnerability of different latch types based on C-elements with respect to soft errors.
N Julai, A Yakovlev, A Bystrov
openaire   +1 more source

Single-Event Upset (SEU) in a Dram with On-Chip Error Correction

IEEE Transactions on Nuclear Science, 1987
The results are given of the first SEU measurements ever reported on IC devices with on-chip error correction. This method of SEU abatement could revolutionize the design of SEU-immune electronic systems.
J. A. Zoutendyk, H. R. Schwartz, R. K. Watson, Z. Hasnain, L. R. Nevill   +4 more
openaire   +1 more source

Design of a Single Event Upset (SEU) Mitigation Technique for Programmable Devices

7th International Symposium on Quality Electronic Design (ISQED'06), 2006
This paper presents a unique SEU (single event upset) mitigation technique based upon temporal data sampling for synchronous circuits and configuration bit storage for programmable devices. The design technique addresses both conventional static SEUs and SETs (single event transients) induced errors that can result in data loss for reconfigurable ...
S. Baloch, T. Arslan, A. Stoica
openaire   +1 more source

Modeling dynamic stability of SRAMS in the presence of single event upsets (SEUs)

2008 IEEE International Symposium on Circuits and Systems, 2008
SRAM yield is very important from an economics viewpoint, because of the extensive use of memory in modern processors and SOCs. Therefore, SRAM stability analysis tools have become essential. SRAM stability analysis based on static noise margin (SNM) often results in pessimistic designs because SNM cannot capture the transient behavior of the noise ...
Rajesh Garg, null Peng Li, Sunil P. Khatri   +2 more
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Single Event Upset (SEU) of Semiconductor Devices - A Summary of JPL Test Data

IEEE Transactions on Nuclear Science, 1983
A summary of the data on single event upset (bit flips) for sixt-y device types, having data storage elements, that were tested by JPL through May, 1982, is presented. The data were taken from fifteen accelerator tests with both protons and heavier ions.
Donald K. Nichols, William E. Price, Carl J. Malone   +2 more
openaire   +1 more source

Neutron Induced Single Event Upset (SEU) Testing of Static Random Access Memory (SRAM) Devices

2014 IEEE Radiation Effects Data Workshop (REDW), 2014
Results of neutron induced single event upset (SEU) testing of two Synchronous Burst Static Random Access Memory (SRAM) devices, the Galvantech GVT71128G36 128K x 36 and the GSI GS816273CC 256K x 72, and the internal RAM (iRAM) in the Texas Instruments SM32C6713BGDPA20EP Digital Signal Processor (DSP) are described.
Michael J. Tostanoski, Terrence F. Deaton, Roy E. Strayer, Rudolf Goldflam, Travis Z. Fullem   +4 more
openaire   +1 more source