Results 181 to 190 of about 10,455 (213)

Total-dose and single-event-upset (SEU) resistance in advanced SRAMs fabricated on SOI using 0.2 μm design rules

2001 IEEE Radiation Effects Data Workshop. NSREC 2001. Workshop Record. Held in conjunction with IEEE Nuclear and Space Radiation Effects Conference (Cat. No.01TH8588), 2002
We measured total-dose and single-event-upset (SEU) resistance in advanced 128-Kbit SRAMs fabricated on SOI using 0.2 /spl mu/m design rules. Our results indicate that the 128-Kbit SRAMs can be used in specific space technologies.
K. Hirose, H. Saito, M. Akiyama, M. Arakaki, Y. Kuroda, S. Ishii, K. Nakano   +6 more
openaire   +1 more source

Single event upset (SEU): Diagnostic and error correction system for avioncs device

2009
In aerospace applications, Commercial-Off-The-Shelf (COTS) Field programmable Gate Array (FPGA) is becoming increasingly attractive by offering low-cost solutions, simplicity and flexibility. This research faces the problem of disturbance induced by high energy particles on electronic devices.
CIANI, LORENZO, CATELANI, MARCANTONIO, L. Veltroni   +2 more
openaire   +1 more source

Single Event Latchup (SEL) and Single Event Upset (SEU) Evaluation of Xilinx 7nm Versal™ ACAP programmable logic (PL)

2021 IEEE Nuclear and Space Radiation Effects Conference (NSREC), 2021
Pierre Maillard, Yanran P. Chen, Jeff Barton, Martin L. Voogel   +3 more
openaire   +1 more source

Efficient protection of polar decoders against Single Event Upsets (SEUs) on user memories

Microelectronics Reliability, 2023
Dong Tian, Zhen Gao, Ruize Wang, Qiang Liu, Anees Ullah, Pedro Reviriego   +5 more
openaire   +1 more source

Model-Based Analysis of Single-Event Upset (SEU) Vulnerability of 6T SRAM Using FinFET Technologies

2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2022
Semiu A. Olowogemo, Hao Qiu, Bor-Tyng Lin, William H. Robinson, Daniel B. Limbrick   +4 more
openaire   +1 more source

Diagnostic and error correction system for avionics devices in presence of single event upset (SEU)

2013
In aerospace applications, Commercial-Off-The-Shelf (COTS) Field programmable Gate Array (FPGA) is becoming increasingly attractive by offering low-cost solutions, simplicity and flexibility. This research faces the problem of disturbance induced by high energy particles on electronic devices.
CATELANI, MARCANTONIO, CIANI, LORENZO
openaire   +1 more source

Single-Event-Upset (SEU) Mitigation Techniques for Routing Resources of SRAM-FPGA

International Journal of Advancements in Computing Technology, 2012
Cheng Gao -, Wei Guo -, Jiaoying Huang -
openaire   +1 more source

Fault tolerant techniques to diagnose and mitigate Single Event Upset (SEU) effects on electronic programmable devices

2008
This research faces the problem of disturbance induced by high energy particles on electronic devices. Based on detailed analysis of this phenomenon, the work is divided into two parts: in the first part testing of the Single Event Upset (SEU) has been carried out with the aim of determining diagnostic techniques and the mitigation of this disturbance,
CIANI, LORENZO, CATELANI, MARCANTONIO, L. Veltroni   +2 more
openaire   +1 more source

Critical Charge Dependency of Single Event Upset (SEU) on the Supply Voltage in Nanometric CMOS SRAMs

2022 Iranian International Conference on Microelectronics (IICM), 2022
Masume Soleimaninia, Gholamreza Raisali, Amir Moslehi   +2 more
openaire   +1 more source

Single Event Upset (SEU) Mitigation Techniques

2007
openaire   +1 more source