Modification of Single Event Upset Cross Section of an SRAM at High Frequencies
IEEE Transactions on Nuclear Science, 1996Single event upset cross sections exhibit a clock frequency dependence, the origins of which have been investigated in a CMOS SRAM, both with a pulsed laser synchronized to the operation of the circuit and with a circuit simulator modeling program.
Stephen P Büchner +2 more
exaly +2 more sources
Measurement of a Cross-Section for Single-Event Gate Rupture in Power MOSFETs
IEEE Electron Device Letters, 1996The heavy-ion fluence required to induce Single-Event Gate Rupture (SEGR) in power MOSFETs is measured as a function of the drain bias, V/sub DS/, and as a function of the gate bias, V/sub GS/. These experiments reveal the abrupt nature of the SEGR-voltage threshold.
P Calvel, M Allenspach, C F Wheatley
exaly +2 more sources
First Nondestructive Measurements of Power MOSFET Single Event Burnout Cross Sections
IEEE Transactions on Nuclear Science, 1987A new technique to nondestructively measure single event burnout cross sections for N-channel power MOSFETs is presented. Previous measurements of power MOSFET burnout susceptibility have been destructive and thus not conducive to providing statistically meaningful burnout probabilities.
Dennis L. Oberg, Jerry L. Wert
exaly +2 more sources
Angled Flip-Flop Single-Event Cross Sections for Submicron Bulk CMOS Technologies
2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2013Experimental angled heavy-ion single-event cross sections for hardened and unhardened flip-flops for technology nodes ranging from 28-nm to 130-nm are compared. Results show that hardened flip-flop cross sections increase at a faster rate with increasing angle of incidence than unhardened designs as technology scales.
Lloyd Massengill +2 more
exaly +2 more sources
Technology Scaling Comparison of Flip-Flop Heavy-Ion Single-Event Upset Cross Sections
IEEE Transactions on Nuclear Science, 2013Heavy-ion experimental results from flip-flops in 180-nm to 28-nm bulk technologies are used to quantify single-event upset trends. The results show that as technologies scale, D flip-flop single-event upset cross sections decrease while redundant storage node flip-flops cross sections may stay the same or increase depending on the layout spacing of ...
Lloyd Massengill +2 more
exaly +2 more sources
Use of New ENDF/B-VI Proton and Neutron Cross Sections for Single Event Upset Calculations
IEEE Transactions on Nuclear Science, 1999Single-event upsets (SEU) in microelectronics are calculated from newly-developed silicon nuclear reaction recoil data for incident protons and neutrons with energies up to 150 MeV. This paper focusses on the nuclear reaction physics that is important for calculating recoil spectra, and burst generation rate spectra.
E Normand, M B Chadwick
exaly +2 more sources
Single-event cross sections of four inverter chains, with uniform inverter spacing ranging from 120 nm to 4 μm, were experimentally measured and compared. These inverter chains were irradiated using a focused ion beam. Waveforms of responses were sensed using on-chip wide-bandwidth analog multiplexers.
Mladen Mitrovic +7 more
openaire +2 more sources
Voltage Dependence of Single-Event Cross Sections of FinFET SRAMs for Low LET Condition
IEEE Transactions on Nuclear Science, 2023Keita Sakamoto +2 more
exaly +2 more sources
Modeling Logic Error Single-Event Cross Sections at the 7-Nm Bulk FinFET Technology Node
IEEE Transactions on Nuclear Science, 2022Bharat Bhuva +2 more
exaly +2 more sources
Single-Event Upset Cross-Section Trends for D-FFs at the 5- and 7-Nm Bulk FinFET Technology Nodes
IEEE Transactions on Nuclear Science, 2023Bharat Bhuva +2 more
exaly +2 more sources

