Results 171 to 180 of about 312,838 (207)

Single Event Upset in SOS Integrated Circuits

IEEE Transactions on Nuclear Science, 1987
Single event upset (SEU) by argon and krypton ions has been observed in 1.25 micron CMOS-SOS integrated circuits. Mixed-mode PISCES-SPICE, circuit-device simulations were conducted and the calculated LET threshold compared favorably to experimental data.
J. G. Rollins, J. Choma, W. A. Kolasinski   +2 more
openaire   +1 more source

Single event upset at ground level

IEEE Transactions on Nuclear Science, 1996
Ground level upsets have been observed in computer systems containing large amounts of random access memory (RAM). Atmospheric neutrons are most likely the major cause of the upsets based on measured data using the Weapons Neutron Research (WNR) neutron beam.
openaire   +1 more source

Nuclear microprobe imaging of single-event upsets

IEEE Transactions on Nuclear Science, 1992
An imaging technique has been developed which produces micron-resolution maps of where single-event upsets occur during ion irradiation of integrated circuits. From these 'upset images' the identity and size of a circuit's upset-prone components can be directly determined.
K.M. Horn, B.L. Doyle, F.W. Sexton
openaire   +1 more source

On single event upset error manifestation

1994
This paper addresses the problem of how faults in a radiation environment primarily manifest as errors in a complex device. Previous work in the area has focused on modelling the latching of transients. In this paper this modelling task is extended to the phenomenon of double soft errors. The first error manifestation of a single event upset (SEU) in a
openaire   +1 more source

Single event upset immune GaAs memories

Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991, 1991
The author describes the design and development status of two different memory architectures which both promise immunity to upset from cosmic rays and energetic protons. The first memory is a conventional static RAM with capacitors added in the memory cell to increase the critical charge for upset above the charge deposited by natural events.
openaire   +1 more source

Detecting Single Event Upsets in Embedded Software

2018 IEEE 21st International Symposium on Real-Time Distributed Computing (ISORC), 2018
The past decade has seen explosive growth in the use of small satellites. Within this domain, there has been a growing trend to place more responsibility on the flight software (versus hardware) and an increasing adoption of consumer-grade microprocessors to satisfy this desire for increased processing capability while still minimizing size, weight ...
Robert Pettit, Aedan Pettit
openaire   +1 more source

Single Event Upset Hardening of Interconnects

2016
With advances in technology scaling, circuits are increasingly more sensitive to transients caused by Single Event particles. Hardening techniques for CMOS combinational logic have been developed to address the problems associated with Single Event Transients , but in these designs, SET coupling effects have been ignored.
openaire   +1 more source

Single event upsets in implantable cardioverter defibrillators

IEEE Transactions on Nuclear Science, 1998
Single event upsets (SEU) have been observed in implantable cardiac defibrillators. The incidence of SEUs is well modeled by upset rate calculations attributable to the secondary cosmic ray neutron flux. The effect of recent interpretations of the shape of the heavy ion cross-section curve on neutron burst generation rate calculations is discussed. The
P.D. Bradley, E. Normand
openaire   +1 more source

SYSTEM LEVEL SINGLE EVENT UPSET MITIGATION STRATEGIES

International Journal of High Speed Electronics and Systems, 2004
Use of a systems engineering process and the application of techniques and methods of fault tolerant systems are applicable to the development of a mitigation strategy for Single Event Upsets (SEU). Specific methods of fault avoidance, fault masking, detection, containment, and recovery techniques are important elements in the mitigation of single ...
openaire   +1 more source

Simulating Single Event Upset Rate with BERT

1994
The circuit level modeling of single event effects is an area of on-giong research. Using this software, users can predict the error rate due to SEU in large circuits.
PAVAN, Paolo, E. Minami, R. Tu, P. K. Ko, C. Hu   +4 more
openaire   +1 more source