Results 1 to 10 of about 1,194,515 (244)

A Novel Low-Power and Soft Error Recovery 10T SRAM Cell [PDF]

open access: yesMicromachines, 2023
In SRAM cells, as the size of transistors and the distance between transistors decrease rapidly, the critical charge of the sensitive node decreases, making SRAM cells more susceptible to soft errors.
Changjun Liu, Hongxia Liu, Jianye Yang
doaj   +2 more sources

Soft Error Reliability Improvement of Digital Circuits by Exploiting a Fast Gate Sizing Scheme [PDF]

open access: goldIEEE Access, 2019
Due to the reduction in device feature size and supply voltage, achieving soft error reliability in sub-micrometer digital circuits is becoming extremely challenging.
Mohsen Raji   +2 more
doaj   +2 more sources

A Review on Soft Error Correcting Techniques of Aerospace-Grade Static RAM-Based Field-Programmable Gate Arrays [PDF]

open access: yesSensors
Aerospace-grade SRAM-based field-programmable gate arrays (FPGAs) used in space applications are highly susceptible to single event effects, leading to soft errors in FPGAs.
Weihang Wang   +4 more
doaj   +2 more sources

In-Pipeline Processor Protection against Soft Errors

open access: yesJournal of Low Power Electronics and Applications, 2023
The shrinking of technology nodes allows higher performance, but susceptibility to soft errors increases. The protection has been implemented mainly by lockstep or hardened process techniques, which results in a lower frequency, a larger area, and higher
Ján Mach   +2 more
doaj   +1 more source

Soft Error Tolerant Count Min Sketches [PDF]

open access: yesIEEE Transactions on Computers, 2021
The estimation of the frequency of the elements on a set is needed in a wide range of computing applications. For example, to estimate the number of hits that a video gets or the number of packets in a network flow. In some cases, the number of elements in the set is very large and it is not practical to maintain a table with the exact count for each ...
Pedro Reviriego   +2 more
openaire   +3 more sources

Influence of Punch Trough Stop Layer and Well Depths on the Robustness of Bulk FinFETs to Heavy Ions Impact

open access: yesIEEE Access, 2022
This study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel.
Antonio Calomarde   +3 more
doaj   +1 more source

Soft output bit error rate estimation for WCDMA [PDF]

open access: yes, 2003
This paper introduces a method that computes an estimation of the bit error rate (BER) based on the RAKE receiver soft output only. For this method no knowledge is needed about the channel characteristics nor the precise external conditions.
Hurink, Johann L.   +3 more
core   +8 more sources

Soft Error Resilience of Deep Residual Networks for Object Recognition

open access: yesIEEE Access, 2020
Convolutional Neural Networks (CNNs) have truly gained attention in object recognition and object classification in particular. When being implemented on Graphics Processing Units (GPUs), deeper networks are more accurate than shallow ones.
Younis Ibrahim   +6 more
doaj   +1 more source

Design of Novel and Low Cost Triple-node Upset Self-recoverable Latch

open access: yesYuanzineng kexue jishu, 2023
With the development of semiconductor technology, the size of transistors continues to shrink. In complex radiation environments in aerospace and other fields, small-sized circuits are more prone to soft error (SE).
BAI Na1,2;MING Tianbo1;XU Yaohua1;WANG Yi1,3;LI Yunfei1,3;LI Li2,3
doaj   +1 more source

Active Radiation-Hardening Strategy in Bulk FinFETs

open access: yesIEEE Access, 2020
In this article, we present a new method to mitigate the effect of the charge collected by trigate FinFET devices after an ionizing particle impact. The method is based on the creation of an internal structure that generates an electrical field that ...
Antonio Calomarde   +3 more
doaj   +1 more source

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