Results 21 to 30 of about 1,194,614 (343)

Understanding soft errors in uncore components [PDF]

open access: yesProceedings of the 52nd Annual Design Automation Conference, 2015
The effects of soft errors in processor cores have been widely studied. However, little has been published about soft errors in uncore components, such as memory subsystem and I/O controllers, of a System-on-a-Chip (SoC). In this work, we study how soft errors in uncore components affect system-level behaviors.
Cho, Hyungmin   +3 more
openaire   +2 more sources

Fast and Accurate Error Simulation for CNNs Against Soft Errors

open access: yesIEEE Transactions on Computers, 2023
The great quest for adopting AI-based computation for safety-/mission-critical applications motivates the interest towards methods for assessing the robustness of the application w.r.t. not only its training/tuning but also errors due to faults, in particular soft errors, affecting the underlying hardware. Two strategies exist: architecture-level fault
Bolchini C.   +3 more
openaire   +3 more sources

ERDNN: Error-Resilient Deep Neural Networks With a New Error Correction Layer and Piece-Wise Rectified Linear Unit

open access: yesIEEE Access, 2020
Deep Learning techniques have been successfully used to solve a wide range of computer vision problems. Due to their high computation complexity, specialized hardware accelerators are being proposed to achieve high performance and efficiency for deep ...
Muhammad Salman Ali   +6 more
doaj   +1 more source

Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery [PDF]

open access: yes, 2014
The trend of downsizing transistors and operating voltage scaling has made the processor chip more sensitive against radiation phenomena making soft errors an important challenge.
González Colás, Antonio María   +2 more
core   +1 more source

On boundary layer in the Mindlin plate model: Levy plates [PDF]

open access: yes, 2008
This work is related to the bending problem of thick rectangular Levy plates. Series solution for the Mindlin (thick) plate model is obtained and represented as a sum of the Kirchhoff (thin) plate model solution, the ``shear terms'' and the ``boundary ...
Brank, Boštjan
core   +1 more source

EBSCN: An Error Backtracking Method for Soft Errors Based on Clustering and a Neural Network

open access: yesIEEE Access, 2019
With the development of integrated circuit design technology, soft errors have become an important threat to system reliability, and software-based fault-tolerant techniques are gradually attracting people's attention.
Nan Zhang   +3 more
doaj   +1 more source

Reactivation and Precise IPN Localization of the Soft Gamma Repeater SGR1900+14 [PDF]

open access: yes, 1998
In 1998 May, the soft gamma repeater SGR1900+14 emerged from several years of quiescence and emitted a series of intense bursts, one with a time history unlike any previously observed from this source.
C. Kouveliotou   +10 more
core   +3 more sources

Soft Error Resilient System Design through Error Correction [PDF]

open access: yes2006 IFIP International Conference on Very Large Scale Integration, 2006
This paper presents an overview of the Built-In Soft Error Resilience (BISER) technique for correcting soft errors in latches, flip-flops and combinational logic. The BISER technique enables more than an order of magnitude reduction in chip-level error soft rate with minimal area impact, 6-10% chip-level power impact, and 1-5% performance impact ...
Subhasish Mitra   +4 more
openaire   +1 more source

Identify Silent Data Corruption Vulnerable Instructions Using SVM

open access: yesIEEE Access, 2019
Silent data corruption (SDC) is the most insidious and harmful result type of soft error. Identify program vulnerable instructions (PVIns) that are likely to cause SDCs is extremely significant on selective software-based protection techniques.
Na Yang, Yun Wang
doaj   +1 more source

Statistical Reliability Estimation of Microprocessor-Based Systems [PDF]

open access: yes, 2012
What is the probability that the execution state of a given microprocessor running a given application is correct, in a certain working environment with a given soft-error rate?
Benso, Alfredo   +5 more
core   +2 more sources

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